REV. B

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reliable. However, no responsibility is assumed by Analog Devices for its

use, nor for any infringements of patents or other rights of third parties

which may result from its use. No license is granted by implication or

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a

AD7008

© Analog Devices, Inc., 1995

One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A.

Tel: 617/329-4700

Fax: 617/326-8703

CMOS

DDS Modulator

FEATURES

Single +5 V Supply

32-Bit Phase Accumulator

On-Chip COSINE and SINE Look-Up Tables

On-Chip 10-Bit DAC

Frequency, Phase and Amplitude Modulation

Parallel and Serial Loading

Software and Hardware Power Down Options

20 MHz and 50 MHz Speed Grades

44-Pin PLCC

APPLICATIONS

Frequency Synthesizers

Frequency, Phase or Amplitude Modulators

DDS Tuning

Digital Modulation

phase modulation, frequency modulation, and both in-phase and

quadrature amplitude modulation suitable for QAM and SSB

generation.

Clock rates up to 20 MHz and 50 MHz are supported. Fre-

quency accuracy can be controlled to one part in 4 billion.

Modulation may be effected by loading registers either through

the parallel microprocessor interface or the serial interface. A

frequency-select pin permits selection between two frequencies

on a per cycle basis.

The serial and parallel interfaces may be operated independently

and asynchronously from the DDS clock; the transfer control

signals are internally synchronized to prevent metastability prob-

lems. The synchronizer can be bypassed to reduce the transfer

latency in the event that the microprocessor clock is synchro-

nous with the DDS clock.

A power-down pin allows external control of a power-down

mode (also accessible through the microprocessor interface)

The AD7008 is available in 44-pin PLCC.

PRODUCT HIGHLIGHT

1. Low Power

2. DSP/

µP Interface

3. Completely Integrated

PRODUCT DESCRIPTION

The AD7008 direct digital synthesis chip is a numerically con-

trolled oscillator employing a 32-bit phase accumulator, sine and

cosine look-up tables and a 10-bit D/A converter integrated on a

single CMOS chip. Modulation capabilities are provided for

FUNCTIONAL BLOCK DIAGRAM

32

32

12

10

10

10

10

10

SIN

COS

12

10-BIT DAC

PHASE

ACCUMULATOR

SIN/COS

ROM

IQMOD [9:0]

IOUT

COMP

FS ADJUST

SDATA

SCLK

GND

RESET

TEST

CLOCK

V

AA

WR

CS

IOUT

AD7008

32-BIT SERIAL REGISTER

32-BIT PARALLEL REGISTER

COMMAND REG

MPU INTERFACE

TRANSFER LOGIC

FULLSCALE

ADJUST

10

IQMOD [19:10]

12

PHASE REG

D0

D15

32

32

FSELECT

MUX

FREQ1

REG

TC0

TC3

LOAD

Σ

10

Σ

FREQ0

REG

Σ

SLEEP

V

REF