WI.232FHSS-25-R datasheet(15/67 Pages) RADIOMETRIX

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WI.232FHSS-25-R/ WI.232FHSS-250-R DATASHEET

Revision 1.1.0

2.3.1. Standby

Standby is selected by writing a 0x02 to regOPMODE. In this mode, the internal oscillator of the module’s

protocol controller is lowered to its slowest setting. The transmitter and receiver hardware is in power-down,

but the radio IC’s oscillator is enabled and running. The Wi.232FHSS-250-R™ module equipped with

version 1.1.0 or newer firmware wakes from standby in less than 6ms. The Wi.232FHSS modules will wake

from standby in 8ms. A negative-going pulse on RxD wakes the module. This negative-going pulse should

be at least 1 bit-time in duration, so sending any byte to the UART will wake it due to the negative-going start

bit. Because the module’s oscillator is not capable at running at ultra-low speeds, use of this mode is not

recommended for new applications. The RAM contents are preserved during standby. If the RAM fails an

integrity check, the module will issue itself a software reset to force reinitialization.

2.3.2. Sleep

Sleep is selected by writing a 0x01 to regOPMODE. The internal oscillator of the module’s protocol controller

is lowered to its slowest setting, and all radio IC services are stopped (receiver, transmitter, oscillator, etc.).

The Wi.232FHSS-250-R™ equipped with version 1.1.0 or newer firmware wakes from sleep in less than

6ms. Older versions of Wi.232FHSS-250-R™ and Wi.232FHSS-25™ wake from sleep in 8ms. A negative-

going pulse on RxD wakes the module. This negative-going pulse should be at least 1 bit-time in duration,

so sending any byte to the UART will wake it due to the negative-going start bit. Because the module’s

oscillator is not capable at running at ultra-low speeds, use of this mode is not recommended for new

applications. The RAM contents are preserved during sleep. If the RAM fails an integrity check, the module

will issue itself a software reset to force reinitialization.

2.3.3. Deep Sleep

Deep sleep is selected by writing a 0x03 to regOPMODE. When the module is put into deep sleep, the CTS

pin is brought high to indicate that the module is not ready to accept UART data. The radio IC is placed in its

lowest power mode and all services are stopped. The protocol controller’s oscillator is also stopped and all

non-essential portions of the chip are turned off. While powered, this mode consumes the least amount of

current. The Wi.232FHSS-250-R™ equipped with version 1.1.0 or newer firmware wakes from deep sleep in

less than 6ms. Older versions of Wi.232FHSS-250-R™ and Wi.232FHSS-25™ wake from deep sleep in

8ms. A negative-going pulse of at least 20μs on C2CK/RST starts the waking process, but the module

doesn’t begin executing wake instructions until the C2CK/RST pin is returned high. As with the other low-

power modes, the RAM contents are preserved. If the RAM fails an integrity check, the module will issue

itself a software reset to force reinitialization. Note that, if your program changes the volatile data rate register

during the host application initialization (regUARTDATARATE), the reinitialization will return the module to

the value indicated by the non-volatile counterpart (regNVUSERDATARATE).

2.4. Addressing Modes

The Wi.232FHSS module has a very flexible addressing scheme incorporated into its firmware. The

addressing modes can be dynamically changed as the module operates. Selection of the addressing

mode is made through the regNVNETWORKMODE and regNETWORKMODE registers. Selection of an

addressing mode forces the transmitter to address packets according to this configuration. When

receiving, a module will receive and process all addressing types, regardless of regNETWORKMODE

configuration. If the received message matches the addressing criteria, it will be passed through to the

UART for transmission to the host processor.

WI.232FHSS-25-R 数据表(PDF) 15 Page - Radiometrix Ltd

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