36

AN30183A

Ver. AEB

2.4 V

1.24 V

2.2 V

2.1 V

1.5 V

1.4 V

NM

NM

NM

1.2 V

0.45 V

@ 150

μs

1.2 V

0.45 V

VBAT

(External input signal)

REF

(IC output signal)

VREG

(IC output signal)

REGW

(IC inner signal)

DVDD

DET

(IC inner signal)

RESET

(External input signal)

LDO1ON

(External input signal)

VLDO1

(IC output signal)

VLDO

2/3/4

(IC output signal)

DCDC1

(IC output signal)

OSC

(IC inner signal)

DVDD

(External input signal)

I2C acceptance starts

I2C acceptance stops

DVDD_DET:High and RESET:High

= I2C acceptance ON

at DCDC-start

at LDO-start

I2C stops

I2C starts

I2C starts

I2C stops

I2C stops

I2C starts

LDO1 starts in NM mode

Pin LDO1 starts

Pin LDO1 stops

Note) The characteristics listed below are reference values derived from the design of the IC and are not guaranteed.

4. Timing Chart (Sequence – 2 (LDO1ON = fixed VBAT))

OPERATION ( Continued )