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MIPSZ2012D1R0 数据表(PDF) 2 Page - Panasonic Semiconductor |
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MIPSZ2012D1R0 数据表(HTML) 2 Page - Panasonic Semiconductor |
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2 / 48 page ![]() 2 AN30183A Ver. AEB ABSOLUTE MAXIMUM RATINGS *1 *3 V – 0.3 to VVBAT + 0.3 LX1,VREG,REF,SDA LDO1,LDO2,LDO3,LDO4 Output Voltage Range *1 *3 V – 0.3 to DVDD + 0.3 SCL,SDA,ASEL *1 *3 V – 0.3 to VVBAT + 0.3 RESET,LDO1ON,FB1, REGCNT Input Voltage Range *1 V 3.6 DVDD — kV 2 HBM (Human Body Model) ESD *2 °C – 30 to + 150 Tj Operating junction temperature *2 °C – 55 to + 150 Tstg Storage temperature *1 A — IIN Output Current Notes Unit Rating Symbol Parameter *2 °C – 30 to + 85 Topr Operating free-air temperature *1 V 6.0 VB,VIN2,DDVBAT1 Supply voltage Notes) Do not apply external currents and voltages to any pin not specifically mentioned. This product may sustain permanent damage if subjected to conditions higher than the above stated absolute maximum rating. This rating is the maximum rating and device operating at this range is not guaranteeable as it is higher than our stated recommended operating range. When subjected under the absolute maximum rating for a long time, the reliability of the product may be affected. *1:The values under the condition not exceeding the above absolute maximum ratings and the power dissipation. *2:Except for the power dissipation, operating ambient temperature, and storage temperature, all ratings are for Ta = 25 °C. *3:V VBAT is voltage for DDVBAT1 = VB = VIN2, (VVBA + 0.3) V must not be exceeded 6 V. V DVDD is voltage for DVDD, (VDVDD + 0.3) V must not be exceeded 3.6 V. *1 Notes 0.181 W 0.348 W 359.0 °C / W 20 pin Wafer level chip size Package (WLCSP Type) PD ( Ta = 85 °C) PD ( Ta = 25 °C) θ JA PACKAGE POWER DISSIPATION RATING Note). For the actual usage, please refer to the PD-Ta characteristics diagram in the package specification, follow the power supply voltage, load and ambient temperature conditions to ensure that there is enough margin and the thermal design does not exceed the allowable value. *1:Glass Epoxy Substrate ( 4 Layers ) [ Glass-Epoxy: 50 X 50 X 0.8 t ( mm ) ] Die Pad Exposed , Soldered. CAUTION Although this has limited built-in ESD protection circuit, but permanent damage may occur on it. Therefore, proper ESD precautions are recommended to avoid electrostatic damage to the MOS gates |
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