AD9807/AD9805

–6–

REV. 0

PIN CONFIGURATION

1

2

3

4

5

6

7

8

9

10

11

13

14

15

16

12

17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

64 63 62 61 60

55 54 53 52 51 50 49

59 58 57 56

PIN 1

IDENTIFIER

TOP VIEW

(Not to Scale)

AVDD

AVSS

CAPT

CAPT

CAPB

CAPB

VREF

CML

VINR

AVSS

VING

AVSS

VINB

AVSS

AVDD

STRTLN

A0

DOUT<9>

DOUT<8>

DOUT<7>

DOUT<6>

DOUT<5>/MPU<7>

DOUT<4>/MPU<6>

DRVDD

DRVSS

DOUT<3>/MPU<5>

DOUT<2>/MPU<4>

DOUT<1>/MPU<3>

DOUT<0>/MPU<2>

MPU<1>

MPU<0>

OEB

AD9805

NC = NO CONNECT

PIN DESCRIPTIONS

Pin No.

Pin Name

Type

Description

1, 15

AVDD

P

+5 V Analog Supply.

2, 10, 12, 14

AVSS

P

Analog Ground.

3, 4

CAPT

AO

Reference Decoupling. See Figure 22.

5, 6

CAPB

AO

Reference Decoupling.

7

VREF

AO

Internal Reference Output. Decouple with 10

µF + 0.1 µF.

8

CML

AO

Internal Bias Voltage. Decouple with 0.1

µF.

9

VINR

AI

Analog Input, Red.

11

VING

AI

Analog Input, Green.

13

VINB

AI

Analog Input, Blue.

16

STRTLN

DI

STRTLN. Indicates beginning of scan line.

17

CDSCLK1

DI

CDS Reset Clock Pulse Input.

18

CDSCLK2

DI

CDS Data Clock Pulse Input.

19

ADCCLK

DI

A/D Sample Clock Input.

28, 52

DVSS

P

Digital Ground.

29, 51

DVDD

P

+5 V Digital Supply.

20

OFFSET<7>

DI

Pixel Rate Offset Coefficient Inputs. Most Significant Bit.

21–26

OFFSET<6:1>

DI

Pixel Rate Offset Coefficient Inputs.

27

OFFSET<0>

DI

Pixel Rate Offset Coefficient Inputs. Least Significant Bit.

30

CSB

DI

Chip Select. Active Low.

31

RDB

DI

Read Strobe. Active Low.

32

WRB

DI

Write Strobe. Active Low.

33

OEB

DI

Output Enable. Active Low.

34

MPU<0>

DIO

Register Input-Output LSB.

35

MPU<1>

DIO

Register Input-Output.

36

DOUT<0>/MPU<2>

DIO

Data Output LSB/Register Input-Output.

37–39, 42

DOUT<1:4>/MPU<3:6>

DIO

Data Output/Register Input-Output.

40

DRVSS

P

Digital Driver Ground.

41

DRVDD

P

Digital Driver Supply.

43

DOUT<5>/MPU<7>

DIO

Data Output/Register Input-Output MSB.

44–46

DOUT<6:8>

DO

Data Outputs.

47

DOUT<9>

DO

Data Output MSB.

48, 49, 50

A0, A1, A2

DI

Register Select Pins.

53, 54

NC

No Connection.

55

GAIN<0>

DI

Pixel Rate Gain Coefficient Input LSB.

56–63

GAIN<1:8>

DI

Pixel Rate Gain Coefficient Inputs.

64

GAIN<9>

DI

Pixel Rate Gain Coefficient Input MSB.

TYPE: AI = Analog Input; AO = Analog Output; DI = Digital Input; DO = Digital Output; DIO = Digital Input/Output; P = Power.