ADE7757 datasheet(3/14 Pages) AD

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PRELIMINARY TECHNICAL DATA

REV. PrC.

–3–

ADE7757

.t2

.t3

.t5

.t6

TIMING CHARACTERISTICS

1, 2

Parameter

A, B Versions

Units

Test Conditions/Comments

550

F1 and F2 Pulsewidth (Logic Low)

See Table II

sec

Output Pulse Period. See Transfer Function Section

1/2 t2

sec

Time Between F1 Falling Edge and F2 Falling Edge

3, 4

180

CF Pulsewidth (Logic High)

See Table III

sec

CF Pulse Period. See Transfer Function Section

T B D

sec

Minimum Time Between F1 and F2 Pulse

NOTES

1Sample tested during initial release and after any redesign or process change that may affect this parameter.

2See Figure 1.

3The pulsewidths of F1, F2 and CF are not fixed for higher output frequencies. See Frequency Outputs Section.

4The CF pulse is always 18 µs in the high frequency mode. See Frequency Outputs section and Table III.

Specifications subject to change without notice.

ORDERING GUIDE

Model

Package Description

Package Options

ADE7757ARN

SOIC narrow-body

RN-16

EVAL-ADE7757EB

Evaluation Board

Figure 1. Timing Diagram for Frequency Outputs

(VDD = 5 V

5%, AGND = DGND = 0 V, On-Chip Reference, rCKLIN = 5 k

Ω 0.1% 5ppm/°C,

TMIN to TMAX = –40 C to +85 C)

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