PRELIMINARY TECHNICAL DATA

REV. PrC.

ADE7757

–4–

ABSOLUTE MAXIMUM RATINGS*

Analog Input Voltage to AGND

V1P, V1N, V2P and V2N . . . . . . . . . . . . . . . –6 V to +6 V

Operating Temperature Range

Industrial (A, B Versions) . . . . . . . . . . . . –40°C to +85°C

Storage Temperature Range . . . . . . . . . . . –65°C to +150°C

Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . +150°C

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily

accumulate on the human body and test equipment and can discharge without detection.

Although the ADE7757 features proprietary ESD protection circuitry, permanent damage may

occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD

precautions are recommended to avoid performance degradation or loss of functionality.

16-Lead Plastic SOIC, Power Dissipation . . . . . . . . . 350mW

θ

. . . . . . . . . . . . . . . . . 124.9°C/W

Lead Temperature, Soldering

Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215°C

Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . +220°C

*Stresses above those listed under Absolute Maximum Ratings may cause

permanent damage to the device. This is a stress rating only; functional

operation of the device at these or any other conditions above those listed in the

operational sections of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect device reliability.

**JEDEC 1S Standard (2 layer) Board Data

TERMINOLOGY

MEASUREMENT ERROR

The error associated with the energy measurement made by the

ADE7757 is defined by the following formula:

%

%

100

7757

×

−

=

Energy

True

Energy

True

ADE

by

registered

Energy

Error

PHASE ERROR BETWEEN CHANNELS

The HPF (High Pass Filter) in the current channel (Channel

V1) has a phase lead response. To offset this phase response

and equalize the phase response between channels, a phase

correction network is also placed in Channel V1. The phase

correction network matches the phase to within ±0.1° over a

range of 45 Hz to 65 Hz and ±0.2° over a range 40 Hz to 1

kHz. See Figures 19 and 20.

POWER SUPPLY REJECTION

This quantifies the ADE7757 measurement error as a percent-

age of reading when the power supplies are varied.

For the ac PSR measurement a reading at nominal supplies

(5 V) is taken. A 200 mV rms/100 Hz signal is then introduced

onto the supplies and a second reading obtained under the

same input signal levels. Any error introduced is expressed as a

percentage of reading—see Measurement Error definition.

For the dc PSR measurement a reading at nominal supplies

(5 V) is taken. The supplies are then varied ±5% and a second

reading is obtained with the same input signal levels. Any error

introduced is again expressed as a percentage of reading.

ADC OFFSET ERROR

This refers to the small dc signal (offset) associated with the

analog inputs to the ADCs. However, the HPF in Channel V1

eliminates the offset in the circuitry. Therefore, the power cal-

culation is not affected by this offset.

FREQUENCY OUTPUT ERROR

The frequency output error of the ADE7757 is defined as

the difference between the measured output frequency (mi-

nus the offset) and the ideal output frequency. The differ-

ence is expressed as a percentage of the ideal frequency.

The ideal frequency is obtained from the ADE7757 trans-

fer function—see Transfer Function section.

GAIN ERROR

The gain error of the ADE7757 is defined as the differ-

ence between the measured output frequency (minus the

offset) and the ideal output frequency. It is measured with

a gain of 1 in channel V1. The difference is expressed as a

percentage of the ideal frequency. The ideal frequency is

obtained from the ADE7757 transfer function—see Trans-

fer Function section.

WARNING!

ESD SENSITIVE DEVICE