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ADP1051ACPZ-R7 数据表(PDF) 9 Page - Analog Devices

部件名 ADP1051ACPZ-R7
功能描述  Digital Controller for Isolated Power Supply with PMBus Interface
PDF  17 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP1051ACPZ-R7 数据表(HTML) 9 Page - Analog Devices

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Preliminary Technical Data
ADP1051
Rev. PrA | Page 9 of 17
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Figure 3. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
VS-
Inverting Voltage Sense Input. This is the connection for the ground line of the power rail. There should be a
low ohmic connection to AGND. It is recommended that the resistor divider on this input have a tolerance
specification of 0.5% or better to allow for trimming.
2
VS+
Noninverting Voltage Sense Input. This signal is referred to VS−. It is recommended that the resistor divider on
this input have a tolerance specification of 0.5% or better to allow for trimming.
3
CS2-
Inverting Differential Current Sense Input. Nominal voltage at this pin should be 1.15 V for best operation.
When using high-side current sensing in a 12 V application, place a 5.62 kΩ resistor between the sense resistor
and this pin. When using low-side current sensing, place a 5 kΩ resistor between the sense resistor and this pin.
When using high-side current sensing, use the formula R = (VCOMMONMODE – 1.15)/1.9mA. A 0.1% resistor must be
used to connect this circuit.
4
CS2+
Noninverting Differential Current Sense Input. Nominal voltage at this pin should be 1.15 V for best operation.
When using high-side current sensing in a 12 V application, place a 5.62 kΩ resistor between the sense resistor
and this pin. When using low-side current sensing, place a 5 kΩ resistor between the sense resistor and this pin.
When using high-side current sensing, use the formula R = (VCOMMONMODE – 1.15)/1.9 mA. A 0.1% resistor must be
used to connect this circuit.
5
VF
Three optional functions can be implemented with this pin: feed forward, primary side input voltage sensing
and input voltage lost detect. It is connected upstream of the output inductor through a resistor divider
network. The nominal voltage at this pin should be 1V. This signal is referred to AGND
6
CS1
Primary Side Current Sense Input. This pin is connected to the primary side current sensing ADC and to the fast
OCP comparator. This signal is referred to AGND. The resistors on this input must have a tolerance specification
of 0.5% or better to allow for trimming.
7
SR1
PWM logic output drive. This pin can be disabled when not in use. This signal is referred to AGND.
8
SR2
PWM logic output drive. This pin can be disabled when not in use. This signal is referred to AGND.
9
OUTA
PWM logic output drive. This pin can be disabled when not in use. This signal is referred to AGND.
10
OUTB
PWM logic output drive. This pin can be disabled when not in use. This signal is referred to AGND.
11
OUTC
PWM logic output drive. This pin can be disabled when not in use. This signal is referred to AGND. This pin can
also be programmed as a synchronization output.
12
OUTD
PWM logic output drive. This pin can be disabled when not in use. This signal is referred to AGND. This pin can
also be programmed as a synchronization output.
13
SYNI/FLGI
Synchronization signal input. It also used as an external signal input to generate a flag condition.
14
SCL
I2C/PMBus Serial Clock Input and Output (Open Drain). This signal is referred to AGND.
15
SDA
I2C/PMBus Serial Data Input and Output (Open Drain). This signal is referred to AGND.
16
CTRL
PMBus CONTROL signal. It is recommended that a 1 nF capacitor be included from the CTRL pin to AGND for
noise debounce and decoupling. This signal is referred to AGND.
17
PG/ALT#
Power Good Output (Open Drain). This signal is referred to AGND. This pin is also used PMBus ALERT# signal.
18
VCORE
Output of 2.6 V regulator. Connect a minimum 330 nF decoupling capacitor from this pin to the AGND as close
as possible to the IC, minimizing the PCB trace length. It is recommended that the VCORE pin not be used as a
reference or to generate other logic levels using resistive dividers.
19
VDD
Positive Supply voltage 3.0 V to 3.6 V referred to AGND. Connect a 2.2 μF decoupling capacitor from this pin to
the AGND as close as possible to the IC, minimizing the PCB trace length.
ADP1051
1
2
VS-
VS+
CTRL
VF
CS1
3
4
5
7
8
9
10
11
24
23
22
21
20
18
17
16
15
14
PG/ALT#
SYNI/FLGI
SDA
SCL
VCORE
TOP VIEW
(Not to Scale)
6
12
13
19
CS2-
CS2+



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