STM32F107VC datasheet(56/103 Pages) STMICROELECTRONICS

56 / 103 page

Electrical characteristics

STM32F105xx, STM32F107xx

56/104

Doc ID 15274 Rev 6

All I/Os are CMOS and TTL compliant (no software configuration required). Their

characteristics cover more than the strict CMOS-technology or TTL parameters. The

coverage of these requirements is shown in Figure 18 and Figure 19 for standard I/Os, and

in Figure 20 and Figure 21 for 5 V tolerant I/Os.

Figure 18.

Standard I/O input characteristics - CMOS port

Vhys

Standard IO Schmitt

trigger voltage

hysteresis(2)

200

IO FT Schmitt trigger

voltage hysteresis(2)

5% VDD

(3)

Ilkg

Input leakage current (4)

VSS ≤ VIN ≤ VDD

Standard I/Os

±1

µA

VIN= 5 V, I/O FT

RPU

Weak pull-

equivalent

resistor(5)

All pins

except for

PA10

VIN = VSS

PA10

RPD

Weak pull-

down

equivalent

resistor(5)

All pins

except for

PA10

VIN = VDD

PA10

CIO

I/O pin capacitance

FT = Five-volt tolerant. In order to sustain a voltage higher than VDD+0.3 the internal pull-up/pull-down resistors must be

disabled.

Hysteresis voltage between Schmitt trigger switching levels. Based on characterization, not tested in production.

With a minimum of 100 mV.

Leakage could be higher than max. if negative current is injected on adjacent pins.

Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This

MOS/NMOS contribution to the series resistance is minimum (~10% order)

Table 36.

I/O static characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

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