LSM330DLCTR datasheet(32/66 Pages) STMICROELECTRONICS

32 / 66 page

Digital interfaces

LSM330DLC

32/66

Doc ID 022162 Rev 2

Digital interfaces

The registers embedded in the LSM330DLC may be accessed through both the I2C and SPI

serial interfaces. The latter may be SW configured to operate either in 3-wire or 4-wire

interface mode.

To select/exploit the I2C interface, the CS line must be tied high (i.e. connected to Vdd_IO).

6.1

I2C serial interface

The LSM330DLC I2C is a bus slave. The I2C is employed to write the data to the registers,

whose content can also be read back.

The relevant I2C terminology is provided in the table below.

There are two signals associated with the I2C bus: the Serial Clock Line (SCL) and the

Serial DAta line (SDA). The latter is a bidirectional line used for sending and receiving the

data to/from the interface.

Table 10.

Serial interface pin description

Pin name

Pin description

CS_A

Linear acceleration SPI enable

Linear acceleration I2C/SPI mode selection (1: I2C mode; 0: SPI enabled)

CS_G

Angular rate SPI enable

Angular rate I2C/SPI mode selection (1: I2C mode; 0: SPI enabled)

SCL_A/G

I2C serial clock (SCL)

SPI serial port clock (SPC)

SDA_A/G

I2C serial data (SDA)

SPI serial data input (SDI)

3-wire interface serial data output (SDO)

SDO_A

SDO_G

I2C least significant bit of the device address (SA0)

SPI serial data output (SDO)

Table 11.

Serial interface pin description

Term

Description

Transmitter

The device which sends data to the bus

Receiver

The device which receives data from the bus

Master

The device which initiates a transfer, generates clock signals and terminates a

transfer

Slave

The device addressed by the master

LSM330DLCTR 数据表(PDF) 32 Page - STMicroelectronics

LSM330DLCTR 数据表(HTML) 32 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66

数据表下载