LSM330DLCTR datasheet(40/66 Pages) STMICROELECTRONICS | iNEMO inertial module: 3D accelerometer and 3D gyroscope

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LSM330DLCTR 数据表(PDF) 40 Page - STMicroelectronics

部件名	LSM330DLCTR

功能描述	iNEMO inertial module: 3D accelerometer and 3D gyroscope

PDF	66 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

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LSM330DLCTR 数据表(HTML) 40 Page - STMicroelectronics

LSM330DLCTR Datasheet HTML 36Page - STMicroelectronics

LSM330DLCTR Datasheet HTML 37Page - STMicroelectronics

LSM330DLCTR Datasheet HTML 38Page - STMicroelectronics

LSM330DLCTR Datasheet HTML 39Page - STMicroelectronics

LSM330DLCTR Datasheet HTML 40Page - STMicroelectronics

LSM330DLCTR Datasheet HTML 41Page - STMicroelectronics

LSM330DLCTR Datasheet HTML 42Page - STMicroelectronics

LSM330DLCTR Datasheet HTML 43Page - STMicroelectronics

LSM330DLCTR Datasheet HTML 44Page - STMicroelectronics

40 / 66 page

background image

Register mapping

LSM330DLC

40/66

Doc ID 022162 Rev 2

TIME_LATENCY_A

Table 16

rw

3C

011 1100

00000000

TIME_WINDOW_A

Table 16

rw

3D

011 1101

00000000

Act_THS

Table 16

rw

3E

011 1110

00000000

Act_DUR

Table 16

rw

3F

011 1111

00000000

Reserved

Table 17

-

00-1E

-

-

Reserved

WHO_AM_I_G

Table 17

rw

0F

0001111

11010100

Reserved

Table 17

rw

10-1F

-

-

CTRL_REG1_G

Table 17

rw

20

010 0000

00000111

CTRL_REG2_G

Table 17

rw

21

010 0001

00000000

CTRL_REG3_G

Table 17

rw

22

010 0010

00000000

CTRL_REG4_G

Table 17

rw

23

010 0011

00000000

CTRL_REG5_G

Table 17

r

24

010 0100

00000000

REFERENCE_G

Table 17

r

25

010 0101

00000000

OUT_TEMP_G

Table 17

r

26

010 0110

output

STATUS_REG_G

Table 17

r

27

010 0111

output

OUT_X_L_G

Table 17

r

28

010 1000

output

OUT_X_H_G

Table 17

r

29

010 1001

output

OUT_Y_L_G

Table 17

r

2A

010 1010

output

OUT_Y_H_G

Table 17

r

2B

010 1011

output

OUT_Z_L_G

Table 17

rw

2C

010 1100

output

OUT_Z_H_G

Table 17

r

2D

010 1101

output

FIFO_CTRL_REG_G

Table 17

rw

2E

010 1110

00000000

FIFO_SRC_REG_G

Table 17

r

2F

010 1111

output

INT1_CFG_G

Table 17

rw

30

011 0001

output

INT1_SRC_G

Table 17

rw

31

011 0001

output

INT1_TSH_XH_G

Table 17

rw

32

011 0010

00000000

INT1_TSH_XL_G

Table 17

rw

33

011 0011

00000000

INT1_TSH_YH_G

Table 17

rw

34

011 0100

00000000

INT1_TSH_YL_G

Table 17

rw

35

011 0101

00000000

INT1_TSH_ZH_G

Table 17

rw

36

011 0110

00000000

INT1_TSH_ZL_G

Table 17

rw

37

011 0111

00000000

INT1_DURATION_G

Table 17

rw

38

011 1000

00000000

Table 18.

Register address map (continued)

Name

Slave

address

Type

Register address

Default

Comment

Hex

Binary

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