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ADIS16COM1/PCBZ 数据表(PDF) 31 Page - Analog Devices

部件名 ADIS16COM1/PCBZ
功能描述  Digital MEMS Vibration Sensor w/ Embedded RF Transceiver
PDF  37 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADIS16COM1/PCBZ 数据表(HTML) 31 Page - Analog Devices

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Preliminary Technical Data
ADIS16000/ADIS16229
Rev. PrA | Page 31 of 37
0 = active low
0
DO1 Polarity
1 = active high
0 = active low
STATUS/ERROR FLAGS
Critical system error flags are in the DIAG_STAT register for
each ADIS16229. These flags indicate various error or alarm
conditions that may influence system performance. Multiple
flags in these registers can be high at one time and the flags will
persist (go high again, after clearing) when the error conditions
continue to exist. The flags in bits 0 through 6 will remain in a
latch condition, until clearing the problem or clearing (using
Use GLOB_CMD[4]). The Alarm flags (upper byte) will latch if
ALM_CTRL[7] = 1 (See Table 41)
Table 84. DIAG_STAT
Page 1-6, Low Byte Address = 0x34, Read/Write
Bits
Description (Default = 0x)
15
Not used
14
System alarm (1 = error condition exists, 0 = no error)
13
Not used
12
Sensor Node 6 (1 = alarm condition, 0 = no alarm)
11
Sensor Node 5 (1 = alarm condition, 0 = no alarm)
10
Sensor Node 4 (1 = alarm condition, 0 = no alarm)
9
Sensor Node 3 (1 = alarm condition, 0 = no alarm)
8
Sensor Node 2 (1 = alarm condition, 0 = no alarm)
7
Sensor Node 1 (1 = alarm condition, 0 = no alarm)
6
Flash memory failure, from GLOB_CMD[5] test
[5:4]
Not used
3
SPI communication failure (SCLKs ≠ even multiple of
16)
2
Flash update failure
1
Power supply > 3.625 V
0
Power supply < 3.125 V
SELF-TEST
Set GLOB_CMD[2] = 1 (DIN = 0xBE02) (see Table 74) to run
an automatic self-test routine, which reports a pass/fail result to
DIAG_STAT[5] (see Table 84).
FLASH MEMORY MANAGEMENT
Set GLOB_CMD[5] = 1 (DIN = 0xB620) to run an internal
checksum test on the flash memory, which reports a pass/fail
result to DIAG_STAT[6]. The FLASH_CNT register (see Table 85)
provides a running count of flash memory write cycles. This is a
tool for managing the endurance of the flash memory. Figure 23
quantifies the relationship between data retention and junction
temperature.
Table 85. FLASH_CNT
Page 1-6, Low Byte Address = 0x04, Read Only
Bits
Description
[15:0]
Binary counter for writing to flash memory
600
450
300
150
0
30
40
JUNCTION TEMPERATURE (°C)
55
70
85
100
125
135
150
Figure 23. Flash®/EE Memory Data Retention



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