ADP7182ACPZ-R7 datasheet(5/28 Pages) ANACHIP

5 / 28 page

Data Sheet

ADP7182

Rev. A | Page 5 of 28

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter

Rating

VIN to GND

+0.3 V to −30 V

VOUT to GND

0.3 V to VIN

EN to GND

5 V to VIN

EN to VIN

+30 V to −0.3 V

ADJ to GND

+0.3 V to VOUT

Storage Temperature Range

−65°C to +150°C

Operating Junction Temperature Range

−40°C to +125°C

Operating Ambient Temperature Range

−40°C to +85°C

Soldering Conditions

JEDEC J-STD-020

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress

rating only; functional operation of the device at these or any

other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect

device reliability.

THERMAL DATA

Absolute maximum ratings apply individually only, not in

combination. The ADP7182 can be damaged when the junction

temperature limits are exceeded. Monitoring ambient temperature

does not guarantee that junction temperature (TJ) is within the

specified temperature limits. In applications with high power

dissipation and poor thermal resistance, the maximum ambient

temperature may have to be derated.

In applications with moderate power dissipation and low printed

circuit board (PCB) thermal resistance, the maximum ambient

temperature can exceed the maximum limit as long as the junction

temperature is within specification limits. The TJ of the device is

dependent on the ambient temperature (TA), the power dissipation

of the device (PD), and the junction-to-ambient thermal resistance

of the package (θJA).

Maximum TJ is calculated from the TA and PD using the formula

TJ = TA + (PD × θJA)

Junction-to-ambient thermal resistance (θJA) of the package is

based on modeling and calculation using a 4-layer board. The

junction-to-ambient thermal resistance is highly dependent

on the application and board layout. In applications where high

maximum power dissipation exists, close attention to thermal

board design is required. The value of θJA may vary, depending

on PCB material, layout, and environmental conditions. The

specified values of θJA are based on a 4-layer, 4 in. × 3 in. circuit

board. See JESD51-7 and JESD51-9 for detailed information on the

board construction. For additional information, see the AN-617

Application Note , MicroCSP™ Wafer Level Chip Scale Package.

ΨJB is the junction-to-board thermal characterization parameter

with units of °C/W. ΨJB of the package is based on modeling and

calculation using a 4-layer board. The JESD51-12, Guidelines for

Reporting and Using Electronic Package Thermal Information,

states that thermal characterization parameters are not the same

as thermal resistances. ΨJB measures the component power

flowing through multiple thermal paths rather than a single

path as in thermal resistance, θJB. Therefore, ΨJB thermal paths

include convection from the top of the package as well as

radiation from the package, factors that make ΨJB more useful

in real-world applications. Maximum junction temperature is

calculated from the board temperature (TB) and power dissipation

using the formula

TJ = TB + (PD × ΨJB)

See JESD51-8 and JESD51-12 for more detailed information

about ΨJB.

THERMAL RESISTANCE

θJA, θJC, and ΨJB are specified for the worst-case conditions, that is, a

device soldered in a circuit board for surface-mount packages.

Table 4. Thermal Resistance

Package Type

θJA

θJC

ΨJB

Unit

8-Lead LFCSP

50.2

31.7

18.2

°C/W

5-Lead TSOT

170

Not applicable

°C/W

ESD CAUTION

ADP7182ACPZ-R7 数据表(PDF) 5 Page - Anachip Corp

ADP7182ACPZ-R7 数据表(HTML) 5 Page - Anachip Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

数据表下载