INTEDG datasheet(117/478 Pages) MICROCHIP

部件名	INTEDG

功能描述	64-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt XLP Technology

PDF	478 Pages

Scroll/Zoom	100%

制造商	MICROCHIP [Microchip Technology]

网页	http://www.microchip.com

标志

117 / 478 page

 2010-2012 Microchip Technology Inc.

DS41414D-page 117

PIC16(L)F1946/47

After the “BSF EECON1,WR” instruction, the processor

requires two cycles to set up the write operation. The

user must place two NOP instructions after the WR bit is

set. The processor will halt internal operations for the

typical 2 ms, only during the cycle in which the write

takes place (i.e., the last word of the block write). This

is not Sleep mode as the clocks and peripherals will

continue to run. The processor does not stall when

LWLO = 1, loading the write latches. After the write

cycle, the processor will resume operation with the third

instruction after the EECON1 write instruction.

FIGURE 11-2:

BLOCK WRITES TO FLASH PROGRAM MEMORY WITH 32 WRITE LATCHES

Program Memory

Buffer Register

EEADRL<4:0> = 00000

Buffer Register

EEADRL<4:0> = 00001

Buffer Register

EEADRL<4:0> = 00010

Buffer Register

EEADRL<4:0> = 11111

EEDATA

EEDATH

First word of block

to be written

Last word of block

to be written

INTEDG 数据表(PDF) 117 Page - Microchip Technology