INTEDG datasheet(139/478 Pages) MICROCHIP

139 / 478 page

 2010-2012 Microchip Technology Inc.

DS41414D-page 139

PIC16(L)F1946/47

12.9

PORTD Registers

PORTD is an 8-bit wide, bidirectional port. The

corresponding data direction register is TRISB

(Register 12-13). Setting a TRISD bit (= 1) will make the

corresponding PORTB pin an input (i.e., put the

corresponding output driver in a High-Impedance mode).

Clearing a TRISD bit (= 0) will make the corresponding

PORTD pin an output (i.e., enable the output driver and

put the contents of the output latch on the selected pin).

Example 12-1 shows how to initialize an I/O port.

Reading the PORTD register (Register 12-13) reads the

status of the pins, whereas writing to it will write to the

PORT latch. All write operations are read-modify-write

operations. Therefore, a write to a port implies that the

port pins are read, this value is modified and then written

to the PORT data latch (LATD).

The TRISD register (Register 12-14) controls the PORTD

pin output drivers, even when they are being used as

analog inputs. The user should ensure the bits in the

TRISD register are maintained set when using them as

analog inputs. I/O pins configured as analog inputs

always read ‘0’.

12.9.1

PORTD FUNCTIONS AND OUTPUT

PRIORITIES

Each PORTD pin is multiplexed with other functions. The

pins, their combined functions and their output priorities

are shown in Table 12-5.

When multiple outputs are enabled, the actual pin

control goes to the peripheral with the highest priority.

Analog input and some digital input functions are not

included in the list below. These input functions can

remain active when the pin is configured as an output.

Certain digital input functions override other port

functions and are included in the priority list.

TABLE 12-9:

PORTD OUTPUT PRIORITY

Pin Name

Function Priority(1)

RD0

SEG0 (LCD)

P2D(2) (CCP)

RD0

RD1

SEG1 (LCD)

P2C(2) (CCP)

RD1

RD2

P2B(2) (CCP)

SEG2 (LCD)

RD2

RD3

SEG3 (LCD)

P3C(2) (CCP)

RD3

RD4

SEG4 (LCD)

P3D(2) (CCP)

SDO2 (SSP2)

RD4

RD5

SEG5 (LCD)

P1C(2) (CCP)

SDA2 (SSP2)

RD5

RD6

SEG5 (LCD)

P1B(2) (CCP)

SCK2/SCL2 (SSP2)

RD6

RD7

SEG7 (LCD)

RD7

Note 1: Priority listed from highest to lowest.

Alternate pin (see APFCON register).

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