INTEDG datasheet(142/478 Pages) MICROCHIP

142 / 478 page

PIC16(L)F1946/47

DS41414D-page 142

 2010-2012 Microchip Technology Inc.

12.11 PORTE Registers

PORTE is an 8-bit wide, bidirectional port. The

corresponding data direction register is TRISE. Setting a

TRISE bit (= 1) will make the corresponding PORTE pin

an input (i.e., put the corresponding output driver in a

High-Impedance mode). Clearing a TRISE bit (= 0) will

make the corresponding PORTE pin an output (i.e.,

enable the output driver and put the contents of the

output latch on the selected pin). Example 12-1 shows

how to initialize an I/O port.

Reading the PORTE register (Register 12-16) reads

the status of the pins, whereas writing to it will write to

the

PORT

latch.

All

write

operations

are

read-modify-write operations. Therefore, a write to a

port implies that the port pins are read, this value is

modified and then written to the PORT data latch

(LATE).

12.11.1

ANSELE REGISTER

The ANSELE register (Register 12-19) is used to

configure the Input mode of an I/O pin to analog.

Setting the appropriate ANSELE bit high will cause all

digital reads on the pin to be read as ‘0’ and allow

analog functions on the pin to operate correctly.

The state of the ANSELE bits has no effect on digital

output functions. A pin with TRIS clear and ANSEL set

will still operate as a digital output, but the Input mode

will be analog. This can cause unexpected behavior

when executing read-modify-write instructions on the

affected port.

The TRISE register (Register 12-17) controls the PORTE

pin output drivers, even when they are being used as

analog inputs. The user should ensure the bits in the

TRISE register are maintained set when using them as

analog inputs. I/O pins configured as analog inputs

always read ‘0’.

12.11.2

PORTE FUNCTIONS AND OUTPUT

PRIORITIES

Each PORTE pin is multiplexed with other functions. The

pins, their combined functions and their output priorities

are shown in Table 12-11.

When multiple outputs are enabled, the actual pin

control goes to the peripheral with the highest priority.

Each PORTE pin is multiplexed with other functions. The

pins, their combined functions and their output priorities

are briefly described here. For additional information,

refer to the appropriate section in this data sheet.

When multiple outputs are enabled, the actual pin

control goes to the peripheral with the lowest number in

the following lists.

Analog input and some digital input functions are not

included in the list below. These input functions can

remain active when the pin is configured as an output.

Certain digital input functions, such as the EUSART RX

signal, override other port functions and are included in

the priority list.

Note:

The ANSELE register must be initialized

to configure an analog channel as a digital

input. Pins configured as analog inputs

will read ‘0’.

TABLE 12-11: PORTE OUTPUT PRIORITY

Pin Name

Function Priority(1)

RE0

P2D(2) (CCP)

RE0

RE1

P2C(2) (CCP)

RE1

RE2

P2B(2) (CCP)

RE2

RE3

P3C(2) (CCP)

COM0 (LCD)

RE3

RE4

P3B(2) (CCP)

COM1 (LCD)

RE4

RE5

P1C(2) (CCP)

COM32(LCD)

RE5

RE6

P1B(2) (CCP)

COM3 (LCD)

RE6

RE7

CCP2(3)/P2A(3) (CCP)

SEG31 (LCD)

RE7

Note 1: Priority listed from highest to lowest.

Default pin (see APFCON register).

Alternate pin (see APFCON register).

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