AD6650SLASHPCB datasheet(2/44 Pages) AD

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AD6650

Rev. A | Page 2 of 44

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

Product Description ......................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Explanation of Test Levels ........................................................... 3

AC Specifications.......................................................................... 3

Digital Specifications ................................................................... 4

Electrical Characteristics............................................................. 5

General Timing Characteristics ................................................. 5

Microprocessor Port Timing Characteristics ........................... 6

Timing Diagrams.......................................................................... 7

Absolute Maximum Ratings.......................................................... 10

Thermal Characteristics ............................................................ 10

ESD Caution................................................................................ 10

Pin Configuration and Function Descriptions........................... 11

Typical Performance Characteristics ........................................... 13

Terminology .................................................................................... 14

Equivalent Circuits ......................................................................... 15

Theory of Operation ...................................................................... 16

Analog Front End ....................................................................... 16

Digital Back End......................................................................... 16

DC Correction ............................................................................ 16

Fourth-Order Cascaded Integrator Comb Filter (CIC4) ...... 17

Infinite Impulse Response (IIR) Filter..................................... 18

RAM Coefficient Filter .............................................................. 18

Composite Filter ......................................................................... 19

Fine DC Correction ................................................................... 20

Peak Detector DC Correction Ranging................................... 20

User-Configurable Built-In Self-Test (BIST) .......................... 21

LO Synthesis................................................................................ 22

LDO.............................................................................................. 23

AGC Loop/Relinearization ....................................................... 23

Serial Output Data Port............................................................. 24

Application Information................................................................ 26

Required Settings and Start-up Sequence for DC Correction

....................................................................................................... 26

Clocking the AD6650 ................................................................ 26

Driving the Analog Inputs ........................................................ 27

External Reference ..................................................................... 27

Power Supplies ............................................................................ 27

Digital Outputs ........................................................................... 28

Grounding ................................................................................... 28

Layout Information .................................................................... 28

Chip Synchronization ................................................................ 29

Microport Control.......................................................................... 30

External Memory Map .............................................................. 30

Access Control Register (ACR) ................................................ 30

Channel Address Register (CAR) ............................................ 30

Special Function Registers ........................................................ 30

Data Address Registers .............................................................. 31

Write Sequencing ....................................................................... 31

Read Sequencing ........................................................................ 31

Read/Write Chaining ................................................................. 31

Programming Modes ................................................................. 31

JTAG Boundary Scan................................................................. 32

Outline Dimensions ....................................................................... 44

Ordering Guide .......................................................................... 44

REVISION HISTORY

1/07—Rev. 0 to Rev. A

Updated Format..................................................................Universal

Changes to Specifications ................................................................ 3

Changes to Figure 18...................................................................... 13

Changes to Power Supplies Section.............................................. 27

Changes to Ordering Guide .......................................................... 44

3/06—Revision 0: Initial Version

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