ADE7753

Rev. C | Page 57 of 60

INTERRUPT STATUS REGISTER (0x0B), RESET INTERRUPT STATUS REGISTER (0x0C),

INTERRUPT ENABLE REGISTER (0x0A)

The status register is used by the MCU to determine the source of an interrupt request (IRQ). When an interrupt event occurs in the

ADE7753, the corresponding flag in the interrupt status register is set to logic high. If the enable bit for this flag is Logic 1 in the interrupt

enable register, the IRQ logic output goes active low. When the MCU services the interrupt, it must first carry out a read from the

interrupt status register to determine the source of the interrupt.

Table 15. Interrupt Status Register, Reset Interrupt Status Register, and Interrupt Enable Register

Bit Location

Interrupt Flag

Description

0

AEHF

Indicates that an interrupt occurred because the active energy register, AENERGY, is more than half full.

1

SAG

Indicates that an interrupt was caused by a SAG on the line voltage.

2

CYCEND

Indicates the end of energy accumulation over an integer number of half line cycles as defined by

the content of the LINECYC register—see the Line Cycle Energy Accumulation Mode section.

3

WSMP

Indicates that new data is present in the waveform register.

4

ZX

This status bit is set to Logic 0 on the rising and falling edge of the the voltage waveform.

See the Zero-Crossing Detection section.

5

TEMP

Indicates that a temperature conversion result is available in the temperature register.

6

RESET

Indicates the end of a reset (for both software or hardware reset). The corresponding enable bit has no

function in the interrupt enable register, i.e., this status bit is set at the end of a reset, but it cannot

be enabled to cause an interrupt.

7

AEOF

Indicates that the active energy register has overflowed.

8

PKV

Indicates that waveform sample from Channel 2 has exceeded the VPKLVL value.

9

PKI

Indicates that waveform sample from Channel 1 has exceeded the IPKLVL value.

A

VAEHF

Indicates that an interrupt occurred because the active energy register, VAENERGY, is more than half full.

B

VAEOF

Indicates that the apparent energy register has overflowed.

C

ZXTO

Indicates that an interrupt was caused by a missing zero crossing on the line voltage for the specified

number of line cycles—see the Zero-Crossing Timeout section.

D

PPOS

Indicates that the power has gone from negative to positive.

E

PNEG

Indicates that the power has gone from positive to negative.

F

RESERVED

Reserved.

00

0

0

0

0

0

00

0

0

00

00

0

8

97

4

5

62

30

1

15 14 13 12 11 10

AEHF

(ACTIVE ENERGY HALF-FULL)

ADDR: 0x0A, 0x0B, 0x0C

SAG

(SAG ONLINE VOLTAGE)

CYCEND

(END OF LINECYC HALF LINE CYCLES)

WSMP

(WAVEFORM SAMPLES DATA READY)

ZX

(ZERO CROSSING)

TEMPL

(TEMPERATURE DATA READY)

RESET

(END OF SOFTWARE/HARDWARE RESET)

AEOF

(ACTIVE ENERGY REGISTER OVERFLOW)

VAEHF

(VAENERGY IS HALF-FULL)

PPOS

(POWER NEGATIVE TO POSITIVE)

RESERVED

PNEG

(POWER POSITIVE TO NEGATIVE)

ZXTO

(ZERO-CROSSING TIMEOUT)

VAEOF

(VAENERGY OVERFLOW)

PK1

(CHANNEL 1 SAMPLE ABOVE IPKLVL)

PKV

(CHANNEL 2 SAMPLE ABOVE VPKLVL)

02875-A-013

Figure 96. Interrupt Status/Interrupt Enable Register