MCP795W21 datasheet(15/54 Pages) MICROCHIP

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 2011-2012 Microchip Technology Inc.

Preliminary

DS22280C-page 15

MCP795W1X/MCP795W2X

CONTROL REG 0X08

R/W

OUT

SQWE

ALM1

ALM0

EXTOSC

RS2

RS1

RS0

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

bit 7

OUT: Output Polarity of MFP bit

This bit sets the logic level on the CLKOUT when not using this as a square wave output.

bit 6

SQWE: Squarewave Enable bit

Setting this bit enables the divided output from the crystal oscillator.

bit 5-4

ALM<1:0>: Alarm Configuration bits

These bits determine which alarms are active

- 00 – No Alarms are active

- 01 – Alarm 0 is active

- 10 – Alarm 1 is active

- 11 – Both Alarms are active

bit 3

EXTOSC: External Oscillator Input bit

Enable bit. Setting this bit will allow an external 32.768 kHz signal to drive the RTCC registers,

eliminating the need for an external crystal.

bit 2-0

RS<2:0>: Calibration Mode bits

Sets the internal divider for the 32.768 kHz oscillator to be driven to the CLKOUT. The following

frequencies are available. The output is responsive to the Calibration register.

- 000 – 1 Hz

- 001 – 4.096 kHz

- 010 – 8.192 kHz

- 011 – 32.768 kHz

- 1XX – enables the Cal output function. Cal output appears on CLKOUT if SQWE is set (1 Hz

nominal).

Note 1:

When RS2 is set to enable the Cal output function, the RTCC counters will continue to increment.

CALIBRATION 0X09

R/W

CALIBRATION

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

bit 7-0

CALIBRATION VALUE<7:0>: Calibration Value bits

Note 1:

This is an 8-bit register that is used to add or subtract clocks from the RTCC counter every minute. The

CALSGN (0x03:7) is the sign bit and indicates if the count should be added or subtracted. The eight bits in

the Calibration register, with each bit adding or subtracting two clocks, gives the user the ability to add or

subtract up to 510 clocks per minute.

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