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OMAP3530ECBBA 数据表(PDF) 181 Page - Texas Instruments

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部件名 OMAP3530ECBBA
功能描述  OMAP3530/25 Applications Processor: OMAP 3 Architecture
PDF  264 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

OMAP3530ECBBA 数据表(HTML) 181 Page - Texas Instruments

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LPDDRDevice
RegionshouldencompassallLPDDRcircuitryandvariesdepending
onplacement.Non-LPDDRsignalsshouldnotberoutedonthe
LPDDRsignallayerswithintheLPDDRkeepoutregion.Non-LPDDR
signalsmayberoutedintheregionprovidedtheyareroutedon
layersseparatedfromLPDDRsignallayersbyagroundlayer.No
breaksshouldbeallowedinthereferencegroundlayersinthis
region.Inaddition,the1.8Vpowerplaneshouldcovertheentirekeep
outregion.
6.4.2.5 Net Classes
6.4.2.6 LPDDR Signal Termination
OMAP3530/25 Applications Processor
www.ti.com
SPRS507F – FEBRUARY 2008 – REVISED OCTOBER 2009
Figure 6-20. LPDDR Keepout Region
Table 6-17 lists the clock net classes for the LPDDR interface. Table 6-18 lists the signal net classes, and
associated clock net classes, for the signals in the LPDDR interface. These net classes are used for the
termination and routing rules that follow.
Table 6-17. Clock Net Class Definitions
CLOCK NET CLASS
OMAP PIN NAMES
CK
sdrc_clk/sdrc_nclk
DQS0
sdrc_dqs0
DQS1
sdrc_dqs1
DQS2
sdrc_dqs2
DQS3
sdrc_dqs3
Table 6-18. Signal Net Class Definitions
CLOCK NET CLASS
ASSOCIATED CLOCK NET CLASS
OMAP PIN NAMES
sdrc_ba, sdrc_a, sdrc_ncs0, sdrc_ncas,
ADDR_CTRL
CK
sdrc_nras, sdrc_nwe, sdrc_cke0
DQ0
DQS0
sdrc_d, sdrc_dm0
DQ1
DQS1
sdrc_d, sdrc_dm1
DQ2
DQS2
sdrc_d, sdrc_dm2
DQ3
DQS3
sdrc_d, sdrc_dm3
No terminations of any kind are required in order to meet signal integrity and overshoot requirements.
Serial terminators are permitted, if desired, to reduce EMI risk; however, serial terminations are the only
type permitted. Table 6-19 shows the specifications for the series terminators.
Table 6-19. LPDDR Signal Terminations
NO.
PARAMETER
MIN
TYP
MAX
UNIT
NOTES
1
CK Net Class
0
10
See Note(1)
(1)
Only series termination is permitted, parallel or SST specifically disallowed.
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TIMING REQUIREMENTS AND SWITCHING CHARACTERISTICS
181



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