 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
OMAP3530ECBC 数据表(PDF) 231 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
OMAP3530ECBC 数据表(HTML) 231 Page - Texas Instruments |
|
|
231 / 264 page  HDQ tDW1 tDW 0 tCYCD 030-097 HDQ Break 0_(LSB ) 1 6 7_(MSB ) tRSPS 0_(LSB ) 1 6 Command _byte _written Data _byte _received 030-098 6.6.6.2 1-Wire Protocol 1-WIRE tRSTH tPDL tPDH tRTSL 030-099 OMAP3530/25 Applications Processor www.ti.com SPRS507F – FEBRUARY 2008 – REVISED OCTOBER 2009 Figure 6-57. HDQ Write Bit Timing (Command/Address or Data) Figure 6-58. HDQ Communication Timing Table 6-112 and Table 6-113 assume testing over the recommended operating conditions (see Figure 6-59 through Figure 6-61). Table 6-112. 1-Wire Timing Requirements PARAMETER DESCRIPTION MIN MAX UNIT tPDH Presence pulse delay high 68 µs tPDL Presence pulse delay low 68 – tPDH tRDV + tREL Read bit-zero time 102 Table 6-113. 1-Wire Switching Characteristics PARAMETER DESCRIPTION MIN TYP MAX UNIT tRSTL Reset time low 484 µs tRSTH Reset time high 484 tSLOT Write bit cycle time 102 tLOW1 Write bit-one time 1.3 tLOW0 Write bit-zero time 101 tREC Recovery time 134 tLOWR Read bit strobe time 13 Figure 6-59. 1-Wire Break (Reset) Timing Submit Documentation Feedback TIMING REQUIREMENTS AND SWITCHING CHARACTERISTICS 231 |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
