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OMAP3530ECBC 数据表(PDF) 137 Page - Texas Instruments |
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OMAP3530ECBC 数据表(HTML) 137 Page - Texas Instruments |
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137 / 264 page  sys.xtalin OCS0 OCS1 OCS1 030-011 4.1.4 External 32-kHz CMOS Input Clock sys_32k CK0 CK1 CK1 030-012 4.1.5 External sys_altclk CMOS Input Clock OMAP3530/25 Applications Processor www.ti.com SPRS507F – FEBRUARY 2008 – REVISED OCTOBER 2009 Figure 4-4. Crystal Oscillator in Bypass Mode A 32.768-kHz clock signal (often abbreviated to 32-kHz) can be supplied by an external 1.8-V CMOS signal on pin sys_32k. Table 4-6 summarizes the electrical constraints imposed to the clock source. Table 4-6. 32-kHz Input Clock Source Electrical Characteristics NAME DESCRIPTION MIN TYP MAX UNIT f Frequency 32.768 kHz CI Input capacitance 0.44 pF RI Input resistance 0.25 106 G Ω Table 4-7 details the input requirements of the 32-kHz input clock. Table 4-7. 32-kHz Input Clock Source Timing Requirements(1) NAME DESCRIPTION MIN TYP MAX UNIT CK0 1 / tc(32k) Frequency, sys_32k 32.768 kHz CK3 tR(32k) Rise time, sys_32k 20 ns CK4 tF(32k) Fall time, sys_32k 20 ns CK5 tJ(32k) Frequency stability, sys_32k ±200 ppm (1) See Table 3-4, Electrical Characteristics, Standard LVCMOS IOs part for sys_32k VIH/VIL parameters. Figure 4-5. 32-kHz CMOS Clock A 48-, 54-, or up to 59- MHz clock signal can be supplied by an external 1.8-V CMOS signal on pin sys_altclk. Table 4-8 summarizes the electrical constraints imposed by the clock source. Table 4-8. 48-, 54-, or up to 59- MHz Input Clock Source Electrical Characteristics NAME DESCRIPTION MIN TYP MAX UNIT f Frequency , sys_altclk 48-, 54-, or up to 59- MHz MHz CI Input capacitance 0.74 pF RI Input resistance 0.25 106 G Ω Table 4-9 details the input requirements of the input clock. Submit Documentation Feedback CLOCK SPECIFICATIONS 137 |
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