LSM303DLHC datasheet(20/42 Pages) STMICROELECTRONICS

部件名	LSM303DLHC

功能描述	Ultra compact high performance e-compass 3D accelerometer and 3D magnetometer module

PDF	42 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

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20 / 42 page

Digital interfaces

LSM303DLHC

20/42

Doc ID 018771 Rev 1

5.1.2

Linear acceleration digital interface

For linear acceleration the default (factory) 7-bit slave address is 0011001b.

The slave address is completed with a Read/Write bit. If the bit is ‘1’ (read), a repeated

START (SR) condition must be issued after the two sub-address bytes; if the bit is ‘0’ (write)

the master transmits to the slave with the direction unchanged.

Table 14 explains how the

ead/write bit pattern is composed, listing all the possible configurations.

In order to read multiple bytes, it is necessary to assert the most significant bit of the sub-

address field. In other words, SUB(7) must be equal to 1 while SUB(6-0) represents the

address of the first register to be read.

In the presented communication format, MAK is master acknowledge and NMAK is no

master acknowledge.

Table 14.

SAD+Read/Write patterns

Command

SAD[7:1]

R/W

SAD+R/W

Read

0011001

00110011 (33h)

Write

0011001

00110010 (32h)

Table 15.

Transfer when master is receiving (reading) multiple bytes of data from slave

Master

SAD

SUB

SAD

MAK

NMAK

Slave

SAK

DATA

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