M24C64-R datasheet(40/42 Pages) STMICROELECTRONICS

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M24C64-W M24C64-R M24C64-F M24C64-DF

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Doc ID 16891 Rev 27

Revision history

Table 25.

Document revision history

Date

Revision

Changes

14-Mar-2011

Updated information concerning E2, E1, E0 for the WLCSP package:

– note under Figure 3: 5-bump WLCSP connections (top view)

– comment under Figure 5: Device select code

– note 3 under Table 2: Device select code

07-Apr-2011

Updated MLP8 package data and Section 10: Part numbering.

Added footnote (a) in Section 4.5: Memory addressing.

18-May-2011

Updated:

– Figure 3: 5-bump WLCSP connections (top view)

– Table 5: Absolute maximum ratings

– Small text changes

Added:

– Figure 12: Memory cell characteristics

08-Sep-2011

Updated:

– Table 21: UFDFPN8 (MLP8) 8-lead ultra thin fine pitch dual flat

package no lead 2 x 3 mm, data

– Figure 14: Maximum Rbus value versus bus parasitic capacitance

Cbus) for an I2C bus at maximum frequency fC = 1MHz

– Figure 6: I2C Fast mode Plus (fC = 1 MHz): maximum Rbus value

versus bus parasitic capacitance (Cbus).

Added tWLDL and tDHWH in:

– Table 16: 400 kHz AC characteristics

– Table 17: 1 MHz AC characteristics

– Figure :

Minor text changes.

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