AD5665BCPZ-R2 datasheet(28/36 Pages) AD

28 / 36 page

AD5625R/AD5645R/AD5665R, AD5625/AD5665

Data Sheet

Rev. C | Page 28 of 36

BROADCAST MODE

Broadcast addressing is supported on the AD56x5R/AD56x5

in write mode only. Broadcast addressing can be used to synchro-

nously update or power down multiple AD56x5R/AD56x5

devices. When the broadcast address is used, the AD56x5R/

AD56x5 respond regardless of the states of the address pins.

The AD56x5R/AD56x5 broadcast address is 00010000.

Table 11. Command Definition

Command

Write to input Register n

Update DAC Register n

Write to input Register n, update all

(software LDAC)

Write to and update DAC Channel n

Power up/power down

Reset

LDAC register setup

Internal reference setup (on/off )

Table 12. DAC Address Command

ADDRESS (n)

DAC A

DAC B

DAC C

DAC D

All DACs

LDAC FUNCTION

The AD56x5R/AD56x5 DACs have double-buffered interfaces

consisting of two banks of registers: input registers and DAC

registers. The input registers are connected directly to the input

shift register, and the digital code is transferred to the relevant

input register upon completion of a valid write sequence. The

DAC registers contain the digital code used by the resistor strings.

Access to the DAC registers is controlled by the LDAC pin.

When the LDAC pin is high, the DAC registers are latched

and the input registers can change state without affecting the

contents of the DAC registers. When LDAC is brought low,

however, the DAC registers become transparent and the contents of

the input registers are transferred to them. The double-buffered

interface is useful if the user requires simultaneous updating of

all DAC outputs. The user can write to one of the input registers

individually and then, by bringing LDAC low when writing to

the other DAC input register, all outputs update simultaneously.

These parts each contain an extra feature whereby a DAC register

is not updated unless its input register has been updated since

the last time LDAC was brought low. Normally, when LDAC is

brought low, the DAC registers are filled with the contents of the

input registers. In the case of the AD56x5R/AD56x5, the DAC

last time the DAC register was updated, thereby removing

unnecessary digital crosstalk.

The outputs of all DACs can be simultaneously updated, using

the hardware LDAC pin.

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