AD8331ARQZ-R7 datasheet(31/56 Pages) AD

31 / 56 page

AD8331/AD8332/AD8334

Rev. G | Page 31 of 56

Gain Input

The GAIN pin is common to both channels of the AD8332. The

input impedance is nominally 10 MΩ, and a bypass capacitor

from 100 pF to 1 nF is recommended.

Parallel connected devices can be driven by a common voltage

source or DAC. Decoupling should take into account any band-

width considerations of the drive waveform, using the total

distributed capacitance.

If gain control noise in LO gain mode becomes a factor, main-

taining ≤15 nV/√Hz noise at the GAIN pin ensures satisfactory

noise performance. Internal noise prevails below 15 nV/√Hz at

the GAIN pin. Gain control noise is negligible in HI gain mode.

VCM Input

The common-mode voltage of Pin VCM, Pin VOL, and Pin VOH

defaults to 2.5 V dc. With output ac-coupled applications, the

VCM pin is unterminated; however, it must still be bypassed in

close proximity for ac grounding of internal circuitry. The VGA

outputs can be dc connected to a differential load, such as an

ADC. Common-mode output voltage levels between 1.5 V and

3.5 V can be realized at Pin VOH and Pin VOL by applying the

desired voltage at Pin VCM. DC-coupled operation is not

recommended when driving loads on a separate PC board.

The voltage on the VCM pin is sourced by an internal buffer

with an output impedance of 30 Ω and a ±2 mA default output

current (see Figure 83). If the VCM pin is driven from an external

source, its output impedance should be <<30 Ω, and its current

drive capability should be >>2 mA. If the VCM pins of several

devices are connected in parallel, the external buffer should be

capable of overcoming their collective output currents. When a

common-mode voltage other than 2.5 V is used, a voltage-

limiting resistor, RCLMP, is needed to protect against overload.

VCM

NEW VCM

RO << 30Ω

100pF

2mA MAX

30Ω

0.1µF

INTERNAL

CIRCUITRY

AC GROUNDING FOR

INTERNAL CIRCUITRY

Figure 83. VCM Interface

Logic Inputs—ENB, MODE, and HILO

The input impedance of all enable pins is nominally 25 kΩ and

can be pulled up to 5 V (a pull-up resistor is recommended) or

driven by any 3 V or 5 V logic families. The enable pin, ENB,

powers down the VGA; when pulled low, the VGA output voltages

are near ground. Multiple devices can be driven from a common

source. Consult Table 3, Table 4, Table 5, and Table 6 for infor-

mation about circuit functions controlled by the enable pins.

Pin HILO is compatible with 3 V or 5 V CMOS logic families. It

is either connected to ground or pulled up to 5 V, depending on

the desired gain range and output noise.

Optional Output Voltage Limiting

The RCLMP pin provides the user with a means to limit the

output voltage swing when used with loads that have no

provisions for prevention of input overdrive. The peak-to-peak

limited voltage is adjusted by a resistor to ground (see Table 8

for a list of several voltage levels and corresponding resistor

values). Unconnected, the default limiting level is 4.5 V p-p.

Note that third harmonic distortion increases as waveform

amplitudes approach clipping. For lowest distortion, the clamp level

should be set higher than the converter input span. A clamp level

of 1.5 V p-p is recommended for a 1 V p-p linear output range,

2.7 V p-p for a 2 V p-p range, or 1 V p-p for a 0.5 V p-p operation.

The best solution is determined experimentally. Figure 84 shows

third harmonic distortion as a function of the limiting level for

a 2 V p-p output signal. A wider limiting level is desirable in HI

gain mode.

–20

–30

–40

–50

–60

–70

–80

1.52.0

2.53.0

4.0

3.5

4.5

5.0

CLAMP LIMIT LEVEL (V p-p)

VGAIN = 0.75V

HILO = LO

HILO = HI

Figure 84. HD3 vs. Clamping Level for 2 V p-p Differential Input

Table 8. Clamp Resistor Values

Clamp Level (V p-p)

Clamp Resistor Value (kΩ)

HILO = LO

HILO = HI

0.5

1.21

1.0

2.74

2.21

1.5

4.75

4.02

2.0

7.5

6.49

2.5

9.53

3.0

16.9

14.7

3.5

26.7

23.2

4.0

49.9

39.2

4.4

100

73.2

Output Decoupling

When driving capacitive loads greater than about 10 pF, or long

circuit connections on other boards, an output network of resistors

and/or ferrite beads can be useful to ensure stability. These

components can be incorporated into a Nyquist filter such as

the one shown in Figure 81. In Figure 81, the resistor value is

84.5 Ω. For example, all the evaluation boards for this series

incorporate 100 Ω in parallel with a 120 nH bead. Lower value

resistors are permissible for applications with nearby loads or

AD8331ARQZ-R7 数据表(PDF) 31 Page - Analog Devices

AD8331ARQZ-R7 数据表(HTML) 31 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56

数据表下载