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AD8331ARQZ-R7 数据表(PDF) 24 Page - Analog Devices |
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AD8331ARQZ-R7 数据表(HTML) 24 Page - Analog Devices |
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24 / 56 page  AD8331/AD8332/AD8334 Rev. G | Page 24 of 56 THEORY OF OPERATION CLAMP LNA 2 LNA 1 INH1 LON1 LOP1 VIP1 VIN1 EN12 INH2 LON2 LOP2 VIP2 PA2 – ATTENUATOR –48dB + VGA BIAS AND INTERPOLATOR + ATTENUATOR –48dB – GAIN UP/ DOWN VMID1 CLAMP GAIN INT VOH1 CLMP12 VOL1 VOL2 GAIN12 HILO VOH2 VIN2 MODE VCM1 VMID2 VMID3 VCM2 VCM3 VMID4 LNA 4 LNA 3 INH3 LON3 LOP3 LMD3 LMD4 INH4 VCM BIAS VCM BIAS PA3 PA4 – ATTENUATOR –48dB + VGA BIAS AND INTERPOLATOR + ATTENUATOR –48dB – GAIN INT VOH3 VOL3 VOL4 GAIN34 VOH4 CLMP34 21dB 21dB 21dB 21dB VIP3 VIN3 VCM4 EN34 VIN4 VIP4 LON4 LOP4 AD8334 LMD1 LMD2 PA1 OVERVIEW The AD8331/AD8332/AD8334 operate in the same way. Figure 69, Figure 70, and Figure 71 are functional block diagrams of the three devices VOL VOH LNA ATTENUATOR –48dB – + INH VIN VIP LOP LON ENBV GAIN AD8331 + – MODE HILO 3.5dB/ 15.5dB RCLMP VMID VCM VGA BIAS AND INTERPOLATOR ENBL GAIN INT VCM BIAS PA 21dB CLAMP LMD Figure 69. AD8331 Functional Block Diagram LNA 2 LNA 1 +19dB INH1 LON1 LOP1 LON2 LOP2 VIP1 VIP2 VIN1 VIN2 LMD1 LMD2 INH2 LNA VMID PA1 PA2 – ATTENUATOR –48dB + VGA BIAS AND INTERPOLATOR + ATTENUATOR –48dB – 3.5dB/ 15.5dB ENB GAIN INT VOH1 VOL1 VOH2 VOL2 GAIN RCLMP HILO AD8332 VMID VCM1 VMID VCM2 CLAMP 21dB 21dB Figure 71. AD8334 Functional Block Diagram Each channel contains an LNA that provides user-adjustable input impedance termination, a differential X-AMP VGA, and a pro- grammable gain postamp with adjustable output voltage limiting. Figure 72 shows a simplified block diagram with external components. Figure 70. AD8332 Functional Block Diagram LNA VOL VOH HILO INH LMD LOP LON PREAMPLIFIER 19dB POSTAMP 3.5dB/15.5dB SIGNAL PATH BIAS AND INTERPOLATOR VIN VIP RCLMP 21dB VCM VMID CLAMP 48dB ATTENUATOR GAIN INTERFACE GAIN VCM BIAS Figure 72. Simplified Block Diagram |
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