SL3ICS1002F7AF datasheet(36/51 Pages) NXP

36 / 51 page

139037

All information provided in this document is subject to legal disclaimers.

Product data sheet

COMPANY PUBLIC

Rev. 3.7 — 9 October 2012

139037

36 of 51

NXP Semiconductors

SL3ICS1002/1202

UCODE G2XM and G2XL

14.12.4 EAS_Alarm

EAS_Alarm is a custom command causing the G2X to immediately backscatter an

EAS-Alarmcode, when EAS ALARM bit is set without any delay caused by Select, Query

and without the need for a backend database.

The EAS feature of the G2X is available after enabling it by sending a ChangeEAS

command described in Section 14.12.3 “ChangeEAS”. With an EAS-Alarm bit set to '1' the

G2X will reply to an EAS_Alarm command by backscattering a fixed 64 bit alarm code. A

G2X will reply to an EAS_Alarm command from the ready state only.

If the EAS-Alarm bit is reset ('0') by sending a ChangeEAS command in the password

protected Secure state the G2X will not reply to an EAS_Alarm command.

The EAS_Alarm command is structured as following:

• 16 bit command

• 16 bit inverted command

• DR (TRcal divide ratio) sets the T=>R link frequency as described in EPCglobal Spec.

6.3.1.2.8 and Table 6.9.

• M (cycles per symbol) sets the T=>R data rate and modulation format as shown in

EPCglobal Spec. Table 6.10.

• TRext chooses whether the T=>R preamble is prepended with a pilot tone as

described in EPCglobal Spec. 6.3.1.3.

A preamble must be prepended the EAS_Alarm command according EPCglobal Spec,

6.3.1.2.8.

Upon receiving an EAS_Alarm command the tag loads the CRC5 register with 01001b

and backscatters the 64 bit alarm code accordingly. The reader is now able to calculate

the CRC5 over the backscattered 64 bits received to verify the received code.

Table 23.

EAS_Alarm command

Command

Inv_Command

TRext

CRC-16

# of bits

description

11100000

00000100

00011111

11111011

0: DR=8

1: DR=64/3

00: M=1

01: M=2

10: M=4

11: M=8

0: No pilot

tone

1: Use pilot

tone

Table 24.

G2X reply to a successful EAS_Alarm command

Header

EAS Code

# of bits

description

CRC5 (MSB)

SL3ICS1002F7AF 数据表(PDF) 36 Page - NXP Semiconductors

SL3ICS1002F7AF 数据表(HTML) 36 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51

数据表下载