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DSPIC33FJMC202ESS 数据表(PDF) 114 Page - Microchip Technology |
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DSPIC33FJMC202ESS 数据表(HTML) 114 Page - Microchip Technology |
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114 / 330 page  dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304 DS70283K-page 114 © 2007-2012 Microchip Technology Inc. 9.6 Power-Saving Control Registers REGISTER 9-1: PMD1: PERIPHERAL MODULE DISABLE CONTROL REGISTER 1 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 U-0 — — T3MD T2MD T1MD QEIMD PWM1MD — bit 15 bit 8 R/W-0 U-0 R/W-0 U-0 R/W-0 U-0 U-0 R/W-0 I2C1MD —U1MD —SPI1MD — —AD1MD(1) bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 15-14 Unimplemented: Read as ‘0’ bit 13 T3MD: Timer3 Module Disable bit 1 = Timer3 module is disabled 0 = Timer3 module is enabled bit 12 T2MD: Timer2 Module Disable bit 1 = Timer2 module is disabled 0 = Timer2 module is enabled bit 11 T1MD: Timer1 Module Disable bit 1 = Timer1 module is disabled 0 = Timer1 module is enabled bit 10 QEIMD: QEI Module Disable bit 1 = QEI module is disabled 0 = QEI module is enabled bit 9 PWM1MD: PWM1 Module Disable bit 1 = PWM1 module is disabled 0 = PWM1 module is enabled bit 8 Unimplemented: Read as ‘0’ bit 7 I2C1MD: I2C1 Module Disable bit 1 = I2C1 module is disabled 0 = I2C1 module is enabled bit 6 Unimplemented: Read as ‘0’ bit 5 U1MD: UART1 Module Disable bit 1 = UART1 module is disabled 0 = UART1 module is enabled bit 4 Unimplemented: Read as ‘0’ bit 3 SPI1MD: SPI1 Module Disable bit 1 = SPI1 module is disabled 0 = SPI1 module is enabled bit 2-1 Unimplemented: Read as ‘0’ bit 0 AD1MD: ADC1 Module Disable bit(1) 1 = ADC1 module is disabled 0 = ADC1 module is enabled Note 1: PCFGx bits have no effect if the ADC module is disabled by setting this bit. In this case, all port pins multiplexed with ANx will be in Digital mode. |
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