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DSPIC33FJMC202ESS 数据表(PDF) 116 Page - Microchip Technology |
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DSPIC33FJMC202ESS 数据表(HTML) 116 Page - Microchip Technology |
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116 / 330 page ![]() dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304 DS70283K-page 116 © 2007-2012 Microchip Technology Inc. REGISTER 9-3: PMD3: PERIPHERAL MODULE DISABLE CONTROL REGISTER 3 U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0 — — — — — — — — bit 15 bit 8 U-0 U-0 U-0 R/W-0 U-0 U-0 U-0 U-0 — — —PWM2MD — — — — bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 15-5 Unimplemented: Read as ‘0’ bit 4 PWM2MD: PWM2 Module Disable bit 1 = PWM2 module is disabled 0 = PWM2 module is enabled bit 3-0 Unimplemented: Read as ‘0’ |
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