MPC8314ECVRAGDA datasheet(6/101 Pages) FREESCALE

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MPC8314E PowerQUICC II Pro Processor Hardware Specifications, Rev. 2

Freescale Semiconductor

MPC8314E Features

2.9

Dual Enhanced Three-Speed Ethernet Controllers (eTSECs)

The eTSECs include the following features:

•

Two SGMII/RGMII/MII/RMII/RTBI interfaces

•

Two controllers designed to comply with IEEE Std 802.3™, IEEE 802.3u™, IEEE 802.3x™,

IEEE 802.3z™, IEEE 802.3au™, IEEE 802.3ab™, and IEEE Std 1588™

•

Support for Wake-on-Magic Packet™, a method to bring the device from standby to full operating

mode

•

MII management interface for external PHY control and status.

2.10

Integrated Programmable Interrupt Controller (IPIC)

The integrated programmable interrupt controller (IPIC) provides a flexible solution for general-purpose

interrupt control. The IPIC programming model is compatible with the MPC8260 interrupt controller and

supports external and internal discrete interrupt sources. Interrupts can also be redirected to an external

interrupt controller.

2.11

Power Management Controller (PMC)

The MPC8314E supports a range of power management states that significantly lower power consumption

under the control of the power management controller. The PMC includes the following features:

•

Provides power management when the device is used in both PCI host and agent modes

•

PCI Power Management 1.2 D0, D1, D2, D3hot, and D3cold states

•

PME generation in PCI agent mode, PME detection in PCI host mode

•

Wake-up from Ethernet (magic packet), USB, GPIO, and PCI (PME input as host) while in the D1,

D2 and D3hot states

•

A new low-power standby power management state called D3warm

— The PMC, one Ethernet port, and the GTM block remain powered via a split power supply

controlled through an external power switch

— Wake-up events include Ethernet (magic packet), GTM, GPIO, or IRQ inputs and cause the

device to transition back to normal operation

— PCI agent mode is not be supported in D3warm state

•

PCI Express-based PME events are not supported

2.12

Serial Peripheral Interface (SPI)

The serial peripheral interface (SPI) allows the MPC8314E to exchange data between other PowerQUICC

family chips, Ethernet PHYs for configuration, and peripheral devices such as EEPROMs, real-time

clocks, A/D converters, and ISDN devices.

The SPI is a full-duplex, synchronous, character-oriented channel that supports a four-wire interface

(receive, transmit, clock, and slave select). The SPI block consists of transmitter and receiver sections, an

independent baud-rate generator, and a control unit.

MPC8314ECVRAGDA 数据表(PDF) 6 Page - Freescale Semiconductor, Inc

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