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MCR03EZPFX4021 数据表(PDF) 16 Page - International Rectifier |
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MCR03EZPFX4021 数据表(HTML) 16 Page - International Rectifier |
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16 / 35 page ![]() Rev 4.0 16 PD-97516 IR3853MPbF SS 0 0 0 0.85*Vref(typical), +/-5% for Min/Max PGood 256/Fs Vsns 0.7V 1.4V 2.1V A PGood window 1.15*Vref(typical), +/-5% for Min/Max 100ns(typical) Delay 100ns(typical) Delay At point “A” the power Good signal goes low, high drive turns off, low drive turns on till Vsns is above Over Voltage threshold and the device latches off. POR (Vcc/Enable) needs to be recycled for new start up. TIMING DIAGRAM OF PGOOD FUNCTION Fig.9a IR3853 Non-Tracking Operation (Seq=Vcc) Fig.9b IR3853 Tracking Operation |
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