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MCR03EZPFX4021 数据表(PDF) 12 Page - International Rectifier

部件名 MCR03EZPFX4021
功能描述  HIGHLY EFFICIENT INTEGRATED 4A, SYNCHRONOUS BUCK REGULATOR
PDF  35 Pages
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制造商  IRF [International Rectifier]
网页  http://www.irf.com
标志 IRF - International Rectifier

MCR03EZPFX4021 数据表(HTML) 12 Page - International Rectifier

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Rev 4.0
12
PD-97516
IR3853MPbF
Circuit Description
THEORY OF OPERATION
Introduction
The IR3853 uses a PWM voltage mode control
scheme with external compensation to provide
good noise immunity and maximum flexibility in
selecting inductor values and capacitor types.
The switching frequency is programmable from
250kHz to 1.5MHz and provides the capability of
optimizing the design in terms of size and
performance.
IR3853 provides precisely regulated output
voltage programmed via two external resistors
from 0.7V to 0.9*Vin.
The IR3853 operates with an external bias
supply from 4.5V to 5.5V, allowing an extended
operating input voltage range from 1.5V to 21V.
The device utilizes the on-resistance of the low
side MOSFET as current sense element, this
method enhances the converter’s efficiency and
reduces cost by eliminating the need for external
current sense resistor
.
IR3853 includes two low R
ds(on) MOSFETs using
IR’s HEXFET technology. These are specifically
designed for high efficiency applications.
Under-Voltage Lockout and POR
The under-voltage lockout circuit monitors the
input supply Vcc and the Enable input. It assures
that the MOSFET driver outputs remain in the off
state whenever either of these two signals drop
below the set thresholds. Normal operation
resumes once Vcc and Enable rise above their
thresholds.
The POR (Power On Ready) signal is generated
when all these signals reach the valid logic level
(see system block diagram). When the POR is
asserted the soft start sequence starts (see soft
start section).
Enable
The Enable features another level of flexibility for
start up. The Enable has precise threshold which
is internally monitored by Under-Voltage Lockout
(UVLO) circuit. Therefore, the IR3853 will turn on
only when the voltage at the Enable pin exceeds
this threshold, typically, 1.2V.
If the input to the Enable pin is derived from the
bus voltage by a suitably programmed resistive
divider, it can be ensured that the IR3853 does not
turn on until the bus voltage reaches the desired
level. Only after the bus voltage reaches or
exceeds this level will the voltage at Enable pin
exceed its threshold, thus enabling the IR3853.
Therefore, in addition to being a logic input pin to
enable the IR3853, the Enable feature, with its
precise threshold, also allows the user to
implement an Under-Voltage Lockout for the bus
voltage V
in. This is desirable particularly for high
output voltage applications, where we might want
the IR3853 to be disabled at least until V
in
exceeds the desired output voltage level.
Figure 3b. shows the recommended start-up
sequence for the non-sequenced operation of
IR3853, when Enable is used as a logic input.
Fig. 3a. Normal Start up, Device turns on
when the Bus voltage reaches 10.2V
Fig. 3b. Recommended startup sequence,
Non-Sequenced operation



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