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ADRF6702ACPZ-R7 数据表(PDF) 22 Page - Analog Devices

部件名 ADRF6702ACPZ-R7
功能描述  1200 MHz to 2400 MHz Quadrature Modulator
PDF  36 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADRF6702ACPZ-R7 数据表(HTML) 22 Page - Analog Devices

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ADRF6702
Data Sheet
Rev. B | Page 22 of 36
REGISTER 1—MODULUS DIVIDE CONTROL
(DEFAULT: 0x003001)
With Register 1, Bits[2:0] set to 001, the on-chip modulus
divide control register is programmed as shown in Figure 42.
Modulus Value
The modulus value is the preset fractional modulus ranging
from 1 to 2047.
REGISTER 2—FRACTIONAL DIVIDE CONTROL
(DEFAULT: 0x001802)
With Register 2, Bits[2:0] set to 010, the on-chip fractional
divide control register is programmed as shown in Figure 43.
Fractional Value
The FRAC value is the preset fractional modulus ranging from
0 to <MDR.
MODULUS VALUE
DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
0
0
0
0
0
0
0
0
0
0
MD10
MD9
MD8
MD7
MD6
MD5
MD4
MD3
MD2
MD1
MD0 C3(0) C2(0) C1(1)
MD10
MD9MD8MD7MD6MD5MD4MD3MD2MD1MD0
0
0000
000
001
0
0000
000
010
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
1
1000
000
000
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
1
1111
111
111
MODULUS VALUE
...
...
2047
CONTROL BITS
1
1536 (DEFAULT)
2
...
...
RESERVED
Figure 42. Register 1—Modulus Divide Control Register Map
FD10
FD9FD8FD7FD6FD5FD4FD3FD2FD1FD0
0
0
00
000
000
0
0
0
00
000
000
1
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
0
1
10
000
000
0
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
FRACTIONAL VALUE MUST BE LESS THAN MODULUS.
FRACTIONAL VALUE
0
1
...
...
768 (DEFAULT)
...
...
<MDR
FRACTIONAL VALUE
RESERVED
DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
CONTROL BITS
0
000
00
000
0
FD10
FD9
FD8
FD7
FD6
FD5
FD4
FD3
FD2
FD1
FD0
C3(0) C2(1) C1(0)
Figure 43. Register 2—Fractional Divide Control Register Map



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