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3.3-VLVCMOS 数据表(PDF) 12 Page - Altera Corporation

部件名 3.3-VLVCMOS
功能描述  This chapterdescribes the electric characteristics, switching characteristics,and I/O timing for Cyclone III devices. A glossary is also included for your reference
PDF  34 Pages
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制造商  ALTERA [Altera Corporation]
网页  http://www.altera.com
标志 ALTERA - Altera Corporation

3.3-VLVCMOS 数据表(HTML) 12 Page - Altera Corporation

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1–12
Chapter 1: Cyclone III Device Datasheet
Electrical Characteristics
Cyclone III Device Handbook
July 2012
Altera Corporation
Volume 2
f For more illustrations of receiver input and transmitter output waveforms, and for
other differential I/O standards, refer to the High-Speed Differential Interfaces in
Cyclone III Devices chapter.
Table 1–16. Cyclone III Devices Differential SSTL I/O Standard Specifications (1)
I/O Standard
VCCIO (V)
VSwing(DC) (V)
VX(AC) (V)
VSwing(AC)
(V)
VOX(AC) (V)
Min
Typ
Max
Min
Max
Min
Typ
Max
Min
Max
Min
Typ
Max
SSTL-2
Class I, II
2.375
2.5
2.625 0.36
VCCIO VCCIO/2 – 0.2
—
VCCIO/2
+ 0.2
0.7
VCCI
O
VCCIO/2 –
0.125
—
VCCIO/2
+ 0.125
SSTL-18
Class I, II
1.7
1.8
1.90
0.25
VCCIO
VCCIO/2 –
0.175
—
VCCIO/2
+ 0.175
0.5
VCCI
O
VCCIO/2 –
0.125
—
VCCIO/2
+ 0.125
Note to Table 1–16:
(1) Differential SSTL requires a VREF input.
Table 1–17. Cyclone III Devices Differential HSTL I/O Standard Specifications (1)
I/O Standard
VCCIO (V)
VDIF(DC) (V)
VX(AC) (V)
VCM(DC) (V)
VDIF(AC) (V)
Min
Typ
Max
Min
Max
Min
Typ
Max
Min
Typ
Max
Mi
n
Max
HSTL-18
Class I, II
1.71
1.8
1.89
0.2
—
0.85
—
0.95
0.85
—
0.95
0.4
—
HSTL-15
Class I, II
1.425
1.5
1.575
0.2
—
0.71
—
0.79
0.71
—
0.79
0.4
—
HSTL-12
Class I, II
1.14
1.2
1.26
0.16
VCCIO 0.48 * VCCIO
—
0.52 *
VCCIO
0.48 *
VCCIO
—
0.52 *
VCCIO
0.3
0.48 *
VCCIO
Note to Table 1–17:
(1) Differential HSTL requires a VREF input.
Table 1–18. Cyclone III Devices Differential I/O Standard Specifications (1)
(Part 1 of 2)
I/O
Standard
VCCIO (V)
VID (mV)
VIcM (V) (2)
VOD (mV) (3)
VOS (V) (3)
Min
Typ
Max
Min
Max
Min
Condition
Max
Min
Typ
Max
Min
Typ
Max
LVPECL
(Row I/Os)
(4)
2.375
2.5
2.625
100
—
0.05
DMAX500 Mbps
1.80
——
—
—
—
—
0.55
500 Mbps
 D
MAX
 700 Mbps
1.80
1.05
DMAX > 700 Mbps
1.55
LVPECL
(Column
I/Os) (4)
2.375
2.5
2.625
100
—
0.05
DMAX 500 Mbps
1.80
——
—
—
—
—
0.55
500 Mbps
 D
MAX
700 Mbps
1.80
1.05
DMAX > 700 Mbps
1.55
LVDS (Row
I/Os)
2.375
2.5
2.625
100
—
0.05
DMAX 500 Mbps
1.80
247
—
600
1.125 1.25 1.375
0.55
500 Mbps
 D
MAX
 700 Mbps
1.80
1.05
DMAX > 700 Mbps
1.55



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