AD7453

Rev. B | Page 12 of 20

TYPICAL CONNECTION DIAGRAM

Figure 17 shows a typical connection diagram for the AD7453.

In this setup, the GND pin is connected to the analog ground

2.5 V decoupled reference source. The signal source is connec-

10 µF tantalum capacitor in parallel with a 0.1 µF ceramic

capacitor. The reference pin should be decoupled to AGND with

a capacitor of at least 0.1 µF. The conversion result is output in a

16-bit word with four leading zeros followed by the MSB of the

12-bit result.

SCLK

SDATA

CS

GND

SERIAL

INTERFACE

+2.7V TO +5.25V

SUPPLY

2.5V

AD780

AD7453

P-TO-P

DC INPUT

VOLTAGE

µC/µP

0.1

µF

10

µF

0.1

µF

Figure 17. Typical Connection Diagram

THE ANALOG INPUT

input is coupled to the signal source and must have an ampli-

input provides an offset from ground or a pseudo ground for

is that they separate the analog input signal ground from the

ADC’s ground, allowing dc common-mode voltages to be

cancelled.

Because the ADC operates from a single supply, it is necessary

to level shift ground-based bipolar signals to comply with the

input requirements. An op amp (for example, the AD8021) can

be configured to rescale and level shift a ground-based (bipolar)

signal so that it is compatible with the input range of the

AD7453. See Figure 18.

When a conversion takes place, the pseudo ground corresponds

to 0 and the maximum analog input corresponds to 4096.

EXTERNAL

R

AD7453

2.5V

1.25V

0V

+1.25V

0V

–1.25V

R

3R

0.1

µF

R

Figure 18. Op Amp Configuration to Level Shift a Bipolar Input Signal

Analog Input Structure

Figure 19 shows the equivalent circuit of the analog input struc-

ture of the AD7453. The four diodes provide ESD protection for

the analog inputs. Care must be taken to ensure that the analog

input signals never exceed the supply rails by more than

300 mV. This causes these diodes to become forward biased and

to start conducting into the substrate. These diodes can conduct

up to 10 mA without causing irreversible damage to the part.

The capacitors, C1 in Figure 19, are typically 4 pF and can be

attributed primarily to pin capacitance. The resistors are

lumped components made up of the on resistance of the

switches. The value of these resistors is typically about 100 Ω.

The capacitors C2 are the ADC’s sampling capacitors, and have

a typical capacitance of 16 pF.

For ac applications, removing high frequency components from

the analog input signal through the use of an RC low-pass filter

on the relevant analog input pins is recommended. In applica-

tions where harmonic distortion and signal-to-noise ratio are

critical, the analog input should be driven from a low imped-

ance source. Large source impedances significantly affect the ac

performance of the ADC, which may necessitate the use of an

input buffer amplifier. The choice of the op amp is a function of

the particular application.

C1

C2

R1

D

D

C1

C2

R1

D

D

Figure 19. Equivalent Analog Input Circuit.

Conversion Phase—Switches Open; Track Phase—Switches Closed