Advanced Clock Drivers Devices

Freescale Semiconductor

3

MPC9446

Table 1. Pin Configuration

Pin

I/O

Type

Function

CCLK0,1

Input

LVCMOS

LVCMOS clock inputs

FSELA, FSELB, FSELC

Input

LVCMOS

Output bank divide select input

MR/OE

Input

LVCMOS

Internal reset and output (high impedance) control

GND

Supply

Negative voltage supply (GND)

Supply

Positive voltage supply for output banks

Supply

Positive voltage supply for core (VCC)

QA0 – QA2

Output

LVCMOS

Bank A outputs

QB0 – QB2

Output

LVCMOS

Bank B outputs

QC0 – QC3

Output

LVCMOS

Bank C outputs

Table 2. Supported Single and Dual Supply Configurations

Supply Voltage Configuration

GND

3.3 V

3.3 V

3.3 V

3.3 V

3.3 V

0 V

Mixed Voltage Supply

3.3 V

3.3 V or 2.5 V

3.3 V

3.3 V or 2.5 V

0 V

2.5 V

2.5 V

2.5 V

2.5 V

2.5 V

0 V

Table 3. Function Table (Controls)

Control

Default

0

1

CCLK_SEL

0

CCLK0

CCLK1

FSELA

0

FSELB

0

FSELC

0

MR/OE

0

Outputs enabled

Internal reset outputs disabled (tristate)

1. Absolute maximum continuous ratings are those maximum values beyond which damage to the device may occur. Exposure to these

conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute-maximum-rated

conditions is not implied.

Symbol

Characteristics

Min

Max

Unit

Condition

Supply Voltage

–0.3

3.6

V

DC Input Voltage

–0.3

V

DC Output Voltage

–0.3

V

DC Input Current

±20

mA

DC Output Current

±50

mA

Storage Temperature

–65

125

°C