Advanced Clock Drivers Devices

4

Freescale Semiconductor

MPC9446

Table 5. General Specifications

Symbol

Characteristics

Min

Typ

Max

Unit

Condition

Output Termination Voltage

V

MM

ESD Protection (Machine Model)

200

V

HBM

ESD Protection (Human Body Model)

2000

V

LU

Latch-Up Immunity

200

mA

Power Dissipation Capacitance

10

pF

Per output

Input Capacitance

4.0

pF

Symbol

Characteristics

Min

Typ

Max

Unit

Condition

Input High Voltage

2.0

V

LVCMOS

Input Low Voltage

–0.3

0.8

V

LVCMOS

1. Input pull-up / pull-down resistors influence input current.

200

µA

Output High Voltage

2.4

V

2. The MPC9446 is capable of driving 50

Ω transmission lines on the incident edge. Each output drives one 50 Ω parallel terminated

Output Low Voltage

0.55

0.30

V

V

Output Impedance

14 – 17

Ω

Maximum Quiescent Supply Current

2.0

mA

1. AC characteristics apply for parallel output termination of 50

Symbol

Characteristics

Min

Typ

Max

Unit

Condition

Input Frequency

0

2. The MPC9446 is functional up to an input and output clock frequency of 350 MHz and is characterized up to 250 MHz.

MHz

Maximum Output Frequency

÷1 output

÷2 output

0

0

125

MHz

MHz

FSELx = 0

FSELx = 1

Reference Input Pulse Width

1.4

ns

CCLK Input Rise/Fall Time

3. Violation of the 1.0 ns maximum input rise and fall time limit will affect the device propagation delay, device-to-device skew, reference input

pulse width, output duty cycle and maximum frequency specifications.

ns

0.8 to 2.0 V

Propagation Delay

CCLK0,1 to any Q

CCLK0,1 to any Q

2.2

2.2

2.8

2.8

4.45

4.2

ns

ns

10

ns

Output Enable Time

10

ns

Output-to-Output Skew

Within one bank

Any output bank, same output divider

Any output, Any output divider

150

200

350

ps

ps

ps

Device-to-Device Skew

2.25

ns

Output Duty Cycle

÷1 output

÷2 output

47

45

50

50

200

53

55

ps

%

%

Output Rise/Fall Time

0.1

1.0

ns

0.55 to 2.4 V