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IO130PDB3V2 数据表(PDF) 28 Page - Microsemi Corporation

部件名 IO130PDB3V2
功能描述  Military ProASIC3/EL Low Power Flash FPGAs with Flash*Freeze Technology
PDF  212 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  MICROSEMI [Microsemi Corporation]
网页  http://www.microsemi.com
标志 MICROSEMI - Microsemi Corporation

IO130PDB3V2 数据表(HTML) 28 Page - Microsemi Corporation

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Military ProASIC3/EL DC and Switching Characteristics
2-14
Revision 3
Table 2-17 • Summary of I/O Output Buffer Power (per pin) – Default I/O Software Settings 1
Applicable to Advanced I/O Banks for A3P250 and A3P1000 Only
CLOAD (pF)
VCCI (V)
Static Power PDC7
(mW) 2
Dynamic Power
PAC10 (µW/MHz) 3
Single-Ended
3.3 V LVTTL /
3.3 V LVCMOS
5
3.3
–
141.97
3.3 V LVCMOS Wide Range
5
3.3
–
141.97
2.5 V LVCMOS
5
2.5
–
79.98
1.8 V LVCMOS
5
1.8
–
52.26
1.5 V LVCMOS (JESD8-11)
5
1.5
–
35.62
3.3 V PCI
10
3.3
–
201.02
3.3 V PCI-X
10
3.3
–
201.02
Differential
LVDS
–
2.5
7.74
89.82
LVPECL
–
3.3
19.54
167.55
Notes:
1. Dynamic Power consumption is given for software default drive strength and output slew. Output load is lower than the
software default.
2. PDC7 is the static power (where applicable) measured on VCCI.
3. PAC10 is the total dynamic power measured on VCCI.
Table 2-18 • Summary of I/O Output Buffer Power (per pin) – Default I/O Software Settings
Applicable to Standard Plus I/O Banks for A3P250 and A3P1000 Only
CLOAD (pF)
VCCI (V)
Static Power
PDC7 (mW) 2
Dynamic Power
PAC10 (µW/MHz) 3
Single-Ended
3.3 V LVTTL /
3.3 V LVCMOS
5
3.3
–
125.97
3.3 V LVCMOS – Wide Range
5
3.3
–
125.97
2.5 V LVCMOS
5
2.5
–
70.82
1.8 V LVCMOS
5
1.8
–
36.39
1.5 V LVCMOS (JESD8-11)
5
1.5
–
25.34
3.3 V PCI
10
3.3
–
184.92
3.3 V PCI-X
10
3.3
–
184.92
Notes:
1. Dynamic Power consumption is given for software default drive strength and output slew. Output load is lower than the
software default.
2. PDC7 is the static power (where applicable) measured on VCCI.
3. PAC10 is the total dynamic power measured on VCCI.



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