CC2500-RTY1 datasheet(17/99 Pages) TI1

17 / 99 page

CC2500

SWRS040C

Page 17 of 89

Circuit Description

BIAS

RBIAS

XOSC_Q1

XOSC_Q2

CSn

SO (GDO1)

XOSC

SCLK

LNA

FREQ

SYNTH

ADC

RADIO CONTROL

RF_P

RF_N

GDO2

GDO0 (ATEST)

RC OSC

Figure 2:

CC2500 Simplified Block Diagram

A simplified block diagram of

CC2500 is shown

in Figure 2.

CC2500

features a low-IF receiver. The

received RF signal is amplified by the low-

noise amplifier (LNA) and down-converted in

quadrature (I and Q) to the intermediate

frequency (IF). At IF, the I/Q signals are

digitised by the ADCs. Automatic gain control

(AGC), fine channel filtering, demodulation

bit/packet

synchronization

are

performed

digitally.

The transmitter part of

CC2500 is based on

direct synthesis of the RF frequency.

The

frequency

synthesizer

includes

completely on-chip LC VCO and a 90 degrees

phase shifter for generating the I and Q LO

signals to the down-conversion mixers in

receive mode.

A crystal is to be connected to XOSC_Q1 and

XOSC_Q2

. The crystal oscillator generates the

reference frequency for the synthesizer, as

well as clocks for the ADC and the digital part.

A 4-wire SPI serial interface is used for

configuration and data buffer access.

The digital baseband includes support for

channel configuration, packet handling, and

data buffering.

Application Circuit

Only a few external components are required

for using the

CC2500. The recommended

application circuit is shown in Figure 3. The

external components are described in Table

14, and typical values are given in Table 15.

Bias Resistor

The bias resistor R171 is used to set an

accurate bias current.

Balun and RF Matching

The components between the RF_N/RF_P pins

and the point where the two signals are joined

together (C122, C132, L121, and L131) form a

CC2500-RTY1 数据表(PDF) 17 Page - Texas Instruments

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