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CC2500-RTY1 数据表(PDF) 83 Page - Texas Instruments |
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CC2500-RTY1 数据表(HTML) 83 Page - Texas Instruments |
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83 / 99 page  CC2500 SWRS040C Page 83 of 89 0x36 (0xF6): WORTIME1 – High Byte of WOR Time Bit Field Name Reset R/W Description 7:0 TIME[15:8] R High byte of timer value in WOR module 0x37 (0xF7): WORTIME0 – Low Byte of WOR Time Bit Field Name Reset R/W Description 7:0 TIME[7:0] R Low byte of timer value in WOR module 0x38 (0xF8): PKTSTATUS – Current GDOx Status and Packet Status Bit Field Name Reset R/W Description 7 CRC_OK R The last CRC comparison matched. Cleared when entering/restarting RX mode. Only valid if PKTCTRL0.CC2400_EN=1. 6 CS R Carrier sense 5 PQT_REACHED R Preamble Quality reached 4 CCA R Channel is clear 3 SFD R Sync word found 2 GDO2 R Current GDO2 value. Note: the reading gives the non-inverted value irrespective what IOCFG2.GDO2_INV is programmed to. It is not recommended to check for PLL lock by reading PKTSTATUS[2] with GDO2_CFG=0x0A. 1 Reserved R0 0 GDO0 R Current GDO0 value. Note: the reading gives the non-inverted value irrespective what IOCFG0.GDO0_INV is programmed to. It is not recommended to check for PLL lock by reading PKTSTATUS[0] with GDO0_CFG=0x0A. 0x39 (0xF9): VCO_VC_DAC – Current Setting from PLL Calibration Module Bit Field Name Reset R/W Description 7:0 VCO_VC_DAC[7:0] R Status register for test only 0x3A (0xFA): TXBYTES – Underflow and Number of Bytes Bit Field Name Reset R/W Description 7 TXFIFO_UNDERFLOW R 6:0 NUM_TXBYTES R Number of bytes in TX FIFO |
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