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AD-DPGIOZ 数据表(PDF) 41 Page - Analog Devices |
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AD-DPGIOZ 数据表(HTML) 41 Page - Analog Devices |
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41 / 61 page ![]() Data Sheet AD9961/AD9963 Rev. A | Page 41 of 60 Transmit Path Gain Adjustment Adjusting the output signal level is implemented by scaling the full-scale output current of the transmit DAC. There are four separate programmable parameters that can be used to adjust the full-scale output of the DACs; the REFIO voltage, the RSET resistance, and the fine and coarse gain control parameters. Adjusting the REFIO Voltage There is a single reference voltage that is used by both the I and Q channel DACs. The REFIO reference voltage is generated by an internal 100 µA current source terminated into a programmable resistor, RREF. The nominal RREF resistance is 10 kΩ resulting in a 1.0 V reference voltage. The resistance can be varied by adjusting the REFIO_ADJ[5:0] bits in Register 0x6E. This adds or subtracts up to 20% from the RREF resistance and hence the REFIO voltage and the DAC full-scale current. A secondary effect to changing the REFIO voltage is that the full-scale voltage in the auxiliary DACs also changes by the same magnitude. The register uses twos complement format in which 011111 maximizes the voltage on the REFIO node and 100000 minimizes the voltage. A curve illustrating the variation of REFIO voltage vs. REFIO_ADJ value is shown in Figure 54. 0.7 0.8 0.9 1.0 1.1 1.2 1.3 0 8 16 24 32 40 48 56 REFIO ADJ Figure 54. Typical VREFIO Voltage vs. REFIO_ADJ Value The REFIO pin should be decoupled to AGND with a 0.1 µF capacitor. If the voltage at REFIO is to be used for external purposes, an external buffer amplifier with an input bias current of less than 100 nA should be used. An external reference can be used in applications requiring tighter gain tolerances or lower temperature drift. Also, a variable external voltage reference can be used to implement a method for gain control of the DAC output. The external reference is applied to the REFIO pin. Note that the 0.1 µF compensation capacitor is not required. The internal reference can be directly overdriven by the external reference, or the internal reference can be powered down. The input impedance of REFIO is 10 kΩ when powered up and 1 MΩ when powered down. Table 20. Reference Operation Reference Mode REFIO Pin Register Setting Internal Connect 0.1 μF capacitor Register 0x60, Bit 6 = 0 (default) External Apply external reference Register 0x60, Bit 6 = 1 (disables internal reference) Adjusting the Current Scaling Resistor Each transmit DAC has a resistor that is used to adjust the full- scale current. The nominal resistance is 16 kΩ, which results in a full-scale current of 2 mA (when VREFIO equals 1.0 V). The 6-bit programmable values, IRSET[5:0] and QRSET[5:0] (Register 0x6A and Register 0x6D), provide an output current adjustment range of ±20% as shown in Figure 55. 1.6 1.8 2.0 2.2 2.4 2.6 0 8 16 24 32 40 48 56 RSET (Ω) Figure 55. Output Current Scaling vs. IRSET and QRSET Values Adjusting the GAIN Parameters Each transmit DAC has coarse and fine gain control parameters for scaling the full-scale output currents. These adjustments change only the full-scale current of the DAC and have no impact on the REFIO voltage. The coarse scale adjust (GAIN1) allows the nominal output current to be changed by ±6 dB in approximately 0.25 dB steps. The adjustment range of the fine scale adjust (GAIN2) is about ±2.5%. Figure 56 and Figure 57 show the resulting gain scaling vs. the GAIN1 and GAIN2 parameters. |
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