 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
AD8381 数据表(PDF) 3 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
AD8381 数据表(HTML) 3 Page - Analog Devices |
|
|
3 / 16 page  REV. B –3– AD8381 TIMING CHARACTERISTICS Parameter Conditions Min Typ Max Unit t1 CLK to Data Setup Time CLK Rise and Fall Time = 5 ns 0 ns t2 CLK to Data Hold Time CLK Rise and Fall Time = 5 ns 5 ns t3 CLK to STSQ Setup Time CLK Rise and Fall Time = 5 ns 0 ns t4 CLK to STSQ Hold Time CLK Rise and Fall Time = 5 ns 5 ns t5 CLK to XFR Setup Time CLK Rise and Fall Time = 5 ns 0 ns t6 CLK to XFR Hold Time CLK Rise and Fall Time = 5 ns 5 ns t7 CLK to VID Delay 13.5 15.5 17.5 ns DB (0:9) CLK STSQ, XFR –1 0 t 3,t5 t 4,t6 t 1 t 2 Figure 1. Timing Requirement E/O = High DB (0:9) CLK STSQ –1 0 XFR t 1 t 2 t 3 t 4 t 5 t 6 Figure 2. Timing Requirements E/O = Low CLK XFR VIDx t 7 Figure 3. Output Timing |
|
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
