AD9754ARURL7 datasheet(10/24 Pages) AD

10 / 24 page

AD9754

–10–

REV. A

These last two equations highlight some of the advantages of

operating the AD9754 differentially. First, the differential op-

eration will help cancel common-mode error sources associated

with IOUTA and IOUTB such as noise, distortion and dc off-

sets. Second, the differential code-dependent current and

subsequent voltage, VDIFF, is twice the value of the single-

ended voltage output (i.e., VOUTA or VOUTB), thus providing

twice the signal power to the load.

Note that the gain drift temperature performance for a single-

ended (VOUTA and VOUTB) or differential output (VDIFF) of

the AD9754 can be enhanced by selecting temperature tracking

resistors for RLOAD and RSET due to their ratiometric relation-

ship as shown in Equation 8.

REFERENCE OPERATION

The AD9754 contains an internal 1.20 V bandgap reference

that can be easily disabled and overridden by an external

reference. REFIO serves as either an input or output, depending

on whether the internal or external reference is selected. If

REFLO is tied to ACOM, as shown in Figure 17, the internal

reference is activated, and REFIO provides a 1.20 V output. In

this case, the internal reference must be compensated externally

with a ceramic chip capacitor of 0.1

µF or greater from REFIO

to REFLO. Also, REFIO should be buffered with an external

amplifier having an input bias current less than 100 nA if any

additional loading is required.

150pF

+1.2V REF

AVDD

REFLO

CURRENT

SOURCE

ARRAY

+5V

REFIO

FS ADJ

0.1 F

AD9754

ADDITIONAL

LOAD

OPTIONAL

EXTERNAL

REF BUFFER

Figure 17. Internal Reference Configuration

The internal reference can be disabled by connecting REFLO to

AVDD. In this case, an external reference may then be applied

to REFIO as shown in Figure 18. The external reference may

provide either a fixed reference voltage to enhance accuracy and

drift performance or a varying reference voltage for gain control.

Note that the 0.1

µF compensation capacitor is not required

since the internal reference is disabled, and the high input im-

pedance (i.e., 1 M

Ω) of REFIO minimizes any loading of the

external reference.

REFERENCE CONTROL AMPLIFIER

The AD9754 also contains an internal control amplifier that is

used to regulate the DAC’s full-scale output current, IOUTFS.

The control amplifier is configured as a V-I converter, as shown

in Figure 18, such that its current output, IREF, is determined by

150pF

+1.2V REF

AVDD

REFLO

CURRENT

SOURCE

ARRAY

AVDD

REFIO

FS ADJ

RSET

AD9754

EXTERNAL

REF

IREF =

VREFIO/RSET

AVDD

REFERENCE

CONTROL

AMPLIFIER

VREFIO

Figure 18. External Reference Configuration

the ratio of the VREFIO and an external resistor, RSET, as stated

in Equation 4. IREF is copied over to the segmented current

sources with the proper scaling factor to set IOUTFS as stated in

Equation 3.

The control amplifier allows a wide (10:1) adjustment span of

IOUTFS over a 2 mA to 20 mA range by setting IREF between

62.5

µA and 625 µA. The wide adjustment span of I

OUTFS

provides several application benefits. The first benefit relates

directly to the power dissipation of the AD9754, which is pro-

portional to IOUTFS (refer to the Power Dissipation section). The

second benefit relates to the 20 dB adjustment, which is useful

for system gain control purposes.

The small signal bandwidth of the reference control amplifier

is approximately 0.5 MHz. The output of the control amplifier

is internally compensated via a 150 pF capacitor that limits the

control amplifier small-signal bandwidth and reduces its output

impedance. Since the –3 dB bandwidth corresponds to the

dominant pole, and hence the time constant, the settling time of

the control amplifier to a stepped reference input response can

be approximated In this case, the time constant can be approxi-

mated to be 320 ns.

There are two methods in which IREF can be varied for a fixed

RSET. The first method is suitable for a single-supply system in

which the internal reference is disabled, and the common-mode

voltage of REFIO is varied over its compliance range of 1.25 V

to 0.10 V. REFIO can be driven by a single-supply amplifier or

DAC, thus allowing IREF to be varied for a fixed RSET. Since the

1.2V

150pF

+1.2V REF

AVDD

REFLO

CURRENT

SOURCE

ARRAY

AVDD

REFIO

FS ADJ

RSET

AD9754

IREF =

VREF /RSET

AVDD

VREF

VDD

RFB

OUT1

OUT2

AGND

DB7–DB0

AD7524

AD1580

0.1V TO 1.2V

Figure 19. Single-Supply Gain Control Circuit

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