AD9754

–16–

REV. A

An example serves to illustrate the effect of supply noise on the

analog supply. Suppose a switching regulator with a switching

frequency of 250 kHz produces 10 mV rms of noise and for

simplicity sake (i.e., ignore harmonics), all of this noise is con-

centrated at 250 kHz. To calculate how much of this undesired

noise will appear as current noise super imposed on the DAC’s

using Figure 32 at 250 kHz. To calculate the PSRR for a given

V/V, adjust the curve in Figure 32 by the scaling factor 20

× Log

Ω, the PSRR is reduced

by 34 dB (i.e., PSRR of the DAC at 1 MHz which is 74 dB in

Proper grounding and decoupling should be a primary objective

in any high speed, high resolution system. The AD9754 features

separate analog and digital supply and ground pins to optimize

the management of analog and digital ground currents in a

system. In general, AVDD, the analog supply, should be decoupled

to ACOM, the analog common, as close to the chip as physi-

cally possible. Similarly, DVDD, the digital supply, should be

decoupled to DCOM as close as physically as possible.

For those applications requiring a single +5 V or +3 V supply

for both the analog and digital supply, a clean analog supply

may be generated using the circuit shown in Figure 33. The

circuit consists of a differential LC filter with separate power

supply and return lines. Lower noise can be attained using low

ESR type electrolytic and tantalum capacitors.

100 F

ELECT.

10-22 F

TANT.

0.1 F

CER.

TTL/CMOS

LOGIC

CIRCUITS

+5V OR +3V

POWER SUPPLY

FERRITE

BEADS

AVDD

ACOM

Figure 33. Differential LC Filter for Single +5 V or +3 V

Applications

Maintaining low noise on power supplies and ground is critical

to obtain optimum results from the AD9754. If properly

implemented, ground planes can perform a host of functions on

high speed circuit boards: bypassing, shielding current trans-

port, etc. In mixed signal design, the analog and digital portions

of the board should be distinct from each other, with the analog

ground plane confined to the areas covering the analog signal

traces, and the digital ground plane confined to areas covering

the digital interconnects.

All analog ground pins of the DAC, reference and other analog

components should be tied directly to the analog ground plane.

The two ground planes should be connected by a path 1/8 to

1/4 inch wide underneath or within 1/2 inch of the DAC to

maintain optimum performance. Care should be taken to ensure

that the ground plane is uninterrupted over crucial signal paths.

On the digital side, this includes the digital input lines running

to the DAC as well as any clock signals. On the analog side, this

includes the DAC output signal, reference signal and the supply

feeders.

The use of wide runs or planes in the routing of power lines is

also recommended. This serves the dual role of providing a low

series impedance power supply to the part, as well as providing

some “free” capacitive decoupling to the appropriate ground

plane. It is essential that care be taken in the layout of signal and

power ground interconnects to avoid inducing extraneous volt-

age drops in the signal ground paths. It is recommended that all

connections be short, direct and as physically close to the pack-

age as possible in order to minimize the sharing of conduction

paths between different currents. When runs exceed an inch in

length, strip line techniques with proper termination resistors

should be considered. The necessity and value of this resistor

will be dependent upon the logic family used.

For a more detailed discussion of the implementation and

construction of high speed, mixed signal printed circuit boards,

refer to Analog Devices’ application notes AN-280 and AN-333.

MULTITONE PERFORMANCE CONSIDERATIONS AND

CHARACTERIZATION

The frequency domain performance of high speed DACs has

traditionally been characterized by analyzing the spectral output

of a reconstructed full-scale (i.e., 0 dBFS), single-tone sine wave

at a particular output frequency and update rate. Although this

characterization data is useful, it is often insufficient to reflect a

DAC’s performance for a reconstructed multitone or spread-

spectrum waveform. In fact, evaluating a DAC’s spectral

performance using a full-scale, single tone at the highest specified

indicative of a DAC’s “worst-case” performance for that given

waveform. In the time domain, this full-scale sine wave represents

that this bandlimited signal will encounter.

FREQUENCY – MHz

–10

–70

–110

2.19

2.81

2.25 2.31

2.38 2.44

2.50 2.56

2.63 2.69

2.75

–20

–60

–80

–100

–40

–50

–90

–30

Figure 34a. Multitone Spectral Plot

However, the inherent nature of a multitone, spread spectrum,

or QAM waveform, in which the spectral energy of the wave-

form is spread over a designated bandwidth, will result in a

higher peak-to-rms ratio when compared to the case of a simple

sine wave. As the reconstructed waveform’s peak-to-average

ratio increases, an increasing amount of the signal energy is

concentrated around the DAC’s midscale value. Figure 34a is

just one example of a bandlimited multitone vector (i.e., eight

tones) centered around one-half the Nyquist bandwidth (i.e.,