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AD7476BRTZ-R23 数据表(PDF) 20 Page - Analog Devices |
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AD7476BRTZ-R23 数据表(HTML) 20 Page - Analog Devices |
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20 / 24 page ![]() AD7476/AD7477/AD7478 Rev. F | Page 20 of 24 SRD SDATA AD7476/ AD7477/ AD74781 DSP56xxx1 SCLK SCK CS SC2 1ADDITIONAL PINS OMITTED FOR CLARITY MISO/PMC0 SDATA AD7476/ AD7477/ AD74781 MC68HC161 SCLK SCLK/PMC2 CS SS/PMC9 1ADDITIONAL PINS OMITTED FOR CLARITY Figure 28. Interfacing to the DSP56xxx Figure 29. Interfacing to the MC68HC16 AD7476/AD7477/AD7478 to MC68HC16 Interface The serial transfer takes place as a 16-bit operation when the SIZE bit in the SPCR register is set to SIZE = 1. To implement the power-down mode with an 8-bit transfer, set SIZE = 0. A connection diagram is shown in Figure 29. The serial peripheral interface (SPI) on the MC68HC16 is configured for master mode (MSTR = 1), the clock polarity bit (CPOL) = 1, and the clock phase bit (CPHA) = 0. The SPI is configured by writing to the SPI Control Register (SPCR). For more information on the MC68HC16, check with Motorola for the related documentation. |
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