ADIS16201PCB datasheet(22/32 Pages) AD

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ADIS16201

Data Sheet

Rev. C | Page 22 of 32

The versatility built into the alarm function is intended to allow

the user to adapt to a number of different applications. For

example, in the case of monitoring a twos complement variable,

the GT1 bit within the ALM_MAG1 control register can allow

for the detection of negative excursions below a fixed level. In

addition, the Alarm 1 and Alarm 2 functions can be set to

monitor the same variable that allows the user to discern if an

output variable remains within a predefined window.

Other options include the ROC function that can be used in

monitoring high frequency shock levels in the acceleration

outputs or slowly changing outputs in the inclination level over

a period of a minute or more. With the addition of the alarm

hardware functionality, the ADIS16201 can be left to run

independently of the main processor and interrupt the system

only when an alarm condition occurs. Conversely, the alarm

condition can be monitored through the routine polling of any

one of the seven data output registers.

Note that the alarm functions work from instantaneous data

and not averaged data that can be present when the AVG_CNT

not latched but tracks the actual alarm conditions in real time.

ALM_MAG1 Register Definition

Address

Default1

Format

Access

0x21, 0x20

0x0000

N/A

R/W

Default is valid only until the first register write cycle.

The ALM_MAG1 register contains the threshold level for

Alarm 1. The contents of this register are nonvolatile.

Table 19. ALM_MAG1 Bit Designations

Bit

Description

Greater than active alarm bit.

1: Alarm is active for an output greater than Alarm

Magnitude 1 register setting.

0: Alarm is active for an output less than Alarm

Magnitude 1 register setting.

Not used.

13:0

Data bits. This number can be either twos

complement or straight binary. The format is set by

the value being monitored by this function.

ALM_SMPL1 Register Definition

Address

Default1

Format

Access

0x25, 0x24

0x0000

Binary

R/W

Default is valid only until the first register write cycle.

The ALM_SMPL1 register contains the sample period

information for Alarm 1, when it is set for rate-of-change alarm

monitoring. The rate-of-change alarm function averages the

change in the output variable over the specified number of

samples and compares this change directly to the values

specified in the ALM_MAG1 register. The contents of this

Table 20. ALM_SMPL1 Bit Designations

Bit

Description

15:8

Not used

7:0

Data bits

ALM_MAG2 Register Definition

Address

Default1

Format

Access

0x23, 0x22

0x0000

N/A

R/W

Default is valid only until the first register write cycle.

The ALM_MAG2 register contains the threshold level for

Alarm 2. The contents of this register are nonvolatile.

Table 21. ALM_MAG2 Bit Designations

Bit

Description

Greater than active alarm bit.

1: Alarm is active for an output greater than Alarm

Magnitude 2 register setting.

0: Alarm is active for an output less than Alarm

Magnitude 2 register setting.

Not used.

13:0

Data bits. This number can be either twos

complement or straight binary. The format is set by

the value being monitored by this function.

ALM_SMPL2 Register Definition

Address

Default1

Format

Access

0x27, 0x26

0x0000

Binary

R/W

Default is valid only until the first register write cycle.

The ALM_SMPL2 register contains the sample period

information for Alarm 2, when it is set for rate-of-change alarm

monitoring. The rate-of-change alarm function averages the

change in the output variable over the specified number of

samples and compares this change directly to the values

specified in the ALM_MAG1 register. The contents of this

Table 22. ALM_SMPL2 Bit Designations

Bit

Description

15:8

Not used

7:0

Data bits

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