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Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com

201998B • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice. • March 20, 2013

AAT1162

12V, 1.5A Step-Down DC/DC Converter

DATA SHEET

Pin Descriptions

Pin #

Symbol

Function

1, 2, EP2

LX

Power switching node. LX is the drain of the internal P-channel switch and N-channel synchronous recti-

fier. Connect the output inductor to the two LX pins and to EP2. A large exposed copper pad under the

package should be used for EP2.

3, 12

N/C

Not connected.

4, 5

IN

Power source input. Connect IN to the input power source. Bypass IN to DGND with a 22μF or greater

capacitor. Connect both IN pins together as close to the IC as possible. An additional 100nF ceramic

capacitor should also be connected between the two IN pins and DGND, pin 6

6, 13,

14, EP1

DGND

Exposed Pad 1 Digital Ground, DGND. The exposed thermal pad (EP1) should be connected to board

ground plane and pins 6, 13, and 14. The ground plane should include a large exposed copper pad under

the package for thermal dissipation (see package outline).

7

AIN

Internal analog bias input. AIN supplies internal power to the AAT1162. Connect AIN to the input source

voltage and bypass to AGND with a 0.1μF or greater capacitor. For additional noise rejection, connect to

the input power source through a 10 or lower value resistor.

8

LDO

Internal LDO bypass node. The output voltage of the internal LDO is bypassed at LDO. The internal

circuitry of the AAT1162 is powered from LDO. Do not draw external power from LDO. Bypass LDO to

AGND with a 1μF or greater capacitor.

9FB

Output voltage feedback input. FB senses the output voltage for regulation control. For fixed output

versions, connect FB to the output voltage. For adjustable versions, drive FB from the output voltage

through a resistive voltage divider. The FB regulation threshold is 0.6V.

10

COMP

Control compensation node. Connect a series RC network from COMP to AGND, R = 51k and C = 150pF.

11

AGND

Analog signal ground. Connect AGND to PGND at a single point as close to the IC as possible.

15

EN

Active high enable input. Drive EN high to turn on the AAT1162; drive it low to turn it off. For automatic

startup, connect EN to IN through a 4.7k resistor. EN must be biased high, biased low, or driven to a

logic level by an external source. Do not let the EN pin float when the device is powered.

16

PGND

Power ground. Connect AGND to PGND at a single point as close to the IC as possible.

Pin Configuration

TDFN34-16

(Top View)

N/C

IN

IN

LX

LX

3

DGND

AIN

LDO

DGND

DGND

N/C

PGND

EN

AGND

COMP

FB

4

5

1

2

6

7

8

14

13

12

16

15

11

10

9

EP2

EP1