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A7986ATR 数据表(PDF) 21 Page - STMicroelectronics |
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A7986ATR 数据表(HTML) 21 Page - STMicroelectronics |
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21 / 42 page ![]() DocID022801 Rev 5 21/42 A7986A Application information Figure 10. Type III compensation network In Figure 11, the Bode diagram of the PWM and LC filter transfer function (GPW0 · GLC(f)) and the open loop gain (GLOOP(f) = GPW0 · GLC(f) · GTYPEIII(f)) are drawn. Figure 11. Open loop gain: module Bode diagram The guidelines for positioning the poles and the zeroes and for calculating the component values can be summarized as follows: 1. Choose a value for R1, usually between 1 kΩ and 5 kΩ. 2. Choose a gain (R4/R1) in order to have the required bandwidth (BW), that means: Equation 24 where K is the feed-forward constant and 1/K is equal to 18. 3. Calculate C4 by placing the zero at 50% of the output filter double pole frequency (fLC): R 4 BW f LC ---------- KR 1 ⋅⋅ = |
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