A7986ATR datasheet(22/42 Pages) STMICROELECTRONICS

22 / 42 page

Application information

A7986A

22/42

DocID022801 Rev 5

Equation 25

Calculate C5 by placing the second pole at four times the system bandwidth (BW):

Equation 26

Set also the first pole at four times the system bandwidth and also the second zero at

the output filter double pole:

Equation 27

The suggested maximum system bandwidth is equal to the switching frequency divided by

3.5 (FSW/3.5), anyway lower than 100 kHz if the FSW is set higher than 500 kHz.

For example, with VOUT = 5 V, VIN = 24 V, IO = 3 A, L = 18 μH, COUT = 22 μF, and ESR<1

Ω, the Type III compensation network is:

Equation 28

In Figure 12, the module and phase of the open loop gain is shown. The bandwidth is about

32 kHz and the phase margin is 51°.

π R

⋅⋅

---------------------------

π R

4BW

⋅

–

⋅⋅

⋅

--------------------------------------------------------------

4BW

⋅

-----------------

–

---------------------------

π R

4BW

⋅⋅ ⋅

-----------------------------------------

4.99k

680

200

3.3nF

22nF

220pF

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